Chris pointed out that it's not necessary to set i64 MUL to Expand

on x86-32 since i64 itself is not a Legal type. And, update some
comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47282 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 10 insertions, 12 deletions

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 5444016..e4eb08b 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -169,13 +169,16 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
     setOperationAction(ISD::BIT_CONVERT      , MVT::i32  , Expand);
   }
 
-  // Scalar integer multiply-high, divide, and remainder are
-  // lowered to use operations that produce two results, to match the
-  // available instructions. This exposes the two-result form to trivial
-  // CSE, which is able to combine x/y and x%y into a single instruction,
-  // for example. The single-result multiply instructions are introduced
-  // in X86ISelDAGToDAG.cpp, after CSE, for uses where the the high part
-  // is not needed.
+  // Scalar integer divide and remainder are lowered to use operations that
+  // produce two results, to match the available instructions. This exposes
+  // the two-result form to trivial CSE, which is able to combine x/y and x%y
+  // into a single instruction.
+  //
+  // Scalar integer multiply-high is also lowered to use two-result
+  // operations, to match the available instructions. However, plain multiply
+  // (low) operations are left as Legal, as there are single-result
+  // instructions for this in x86. Using the two-result multiply instructions
+  // when both high and low results are needed must be arranged by dagcombine.
   setOperationAction(ISD::MULHS           , MVT::i8    , Expand);
   setOperationAction(ISD::MULHU           , MVT::i8    , Expand);
   setOperationAction(ISD::SDIV            , MVT::i8    , Expand);
@@ -201,11 +204,6 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
   setOperationAction(ISD::SREM            , MVT::i64   , Expand);
   setOperationAction(ISD::UREM            , MVT::i64   , Expand);
 
-  // 8, 16, and 32-bit plain multiply are legal. And 64-bit multiply
-  // is also legal on x86-64.
-  if (!Subtarget->is64Bit())
-    setOperationAction(ISD::MUL           , MVT::i64   , Expand);
-
   setOperationAction(ISD::BR_JT            , MVT::Other, Expand);
   setOperationAction(ISD::BRCOND           , MVT::Other, Custom);
   setOperationAction(ISD::BR_CC            , MVT::Other, Expand);