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author | Michael Gottesman <mgottesman@apple.com> | 2013-06-18 20:49:40 +0000 |
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committer | Michael Gottesman <mgottesman@apple.com> | 2013-06-18 20:49:40 +0000 |
commit | 8493edfb4b61e5c63669fc19a55b640e1ad7aee1 (patch) | |
tree | 5b69e41beb47add0f2ae2c4953ea8b96c9337d30 | |
parent | f3426a482ea24c399df7c4abaa1ff8f7a9d9dfc8 (diff) | |
download | external_llvm-8493edfb4b61e5c63669fc19a55b640e1ad7aee1.zip external_llvm-8493edfb4b61e5c63669fc19a55b640e1ad7aee1.tar.gz external_llvm-8493edfb4b61e5c63669fc19a55b640e1ad7aee1.tar.bz2 |
Converted an overly aggressive assert to a conditional check in AddCombineTo64bitMLAL.
Said assert assumes that ADDC will always have a glue node as its second
argument and is checked before we even know that we are actually performing the
relevant MLAL optimization. This is incorrect since on ARM we *CAN* codegen ADDC
with a use list based second argument. Thus to have both effects, I converted
the assert to a conditional check which if it fails we do not perform the
optimization.
In terms of tests I can not produce an ADDC from the IR level until I get in my
multiprecision optimization patch which is forthcoming. The tests for said patch
would cause this assert to fail implying that said tests will provide the
relevant tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184230 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index ec0e9c2..015b023 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -7948,8 +7948,11 @@ static SDValue AddCombineTo64bitMLAL(SDNode *AddcNode, assert(AddcNode->getNumValues() == 2 && AddcNode->getValueType(0) == MVT::i32 && - AddcNode->getValueType(1) == MVT::Glue && - "Expect ADDC with two result values: i32, glue"); + "Expect ADDC with two result values. First: i32"); + + // Check that we have a glued ADDC node. + if (AddcNode->getValueType(1) != MVT::Glue) + return SDValue(); // Check that the ADDC adds the low result of the S/UMUL_LOHI. if (AddcOp0->getOpcode() != ISD::UMUL_LOHI && |