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authorEdward O'Callaghan <eocallaghan@auroraux.org>2009-10-12 06:14:06 +0000
committerEdward O'Callaghan <eocallaghan@auroraux.org>2009-10-12 06:14:06 +0000
commit853075e7623b73f5e91c580da79e95232c83c8f7 (patch)
tree6d35396eb47904e9c3ab4c61693782f5608f5048
parent677c89d8bfaf17587076703816730c75c68c894b (diff)
downloadexternal_llvm-853075e7623b73f5e91c580da79e95232c83c8f7.zip
external_llvm-853075e7623b73f5e91c580da79e95232c83c8f7.tar.gz
external_llvm-853075e7623b73f5e91c580da79e95232c83c8f7.tar.bz2
Convert InstCombine tests from notcast to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83825 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll32
-rw-r--r--test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll6
-rw-r--r--test/Transforms/InstCombine/2008-01-21-MismatchedCastAndCompare.ll7
-rw-r--r--test/Transforms/InstCombine/2008-01-21-MulTrunc.ll6
-rw-r--r--test/Transforms/InstCombine/zext.ll7
5 files changed, 49 insertions, 9 deletions
diff --git a/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll b/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
index a1c77c2..187e2f5 100644
--- a/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
+++ b/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
@@ -9,124 +9,152 @@
; be eliminated. In many cases the setCC is also eliminated based on the
; constant value and the range of the casted value.
;
-; RUN: opt < %s -instcombine -S | \
-; RUN: notcast .*int
+; RUN: opt < %s -instcombine -S | FileCheck %s
; END.
define i1 @lt_signed_to_large_unsigned(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp ult i32 %Y, 1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: %C1 = icmp sgt i8 %SB, -1
+; CHECK: ret i1 %C1
}
define i1 @lt_signed_to_large_signed(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp slt i32 %Y, 1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 true
}
define i1 @lt_signed_to_large_negative(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp slt i32 %Y, -1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 false
}
define i1 @lt_signed_to_small_signed(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp slt i32 %Y, 17 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: %C = icmp slt i8 %SB, 17
+; CHECK: ret i1 %C
}
define i1 @lt_signed_to_small_negative(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp slt i32 %Y, -17 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: %C = icmp slt i8 %SB, -17
+; CHECK: ret i1 %C
}
define i1 @lt_unsigned_to_large_unsigned(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp ult i32 %Y, 1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 true
}
define i1 @lt_unsigned_to_large_signed(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp slt i32 %Y, 1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 true
}
define i1 @lt_unsigned_to_large_negative(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp slt i32 %Y, -1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 false
}
define i1 @lt_unsigned_to_small_unsigned(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp ult i32 %Y, 17 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: %C = icmp ult i8 %SB, 17
+; CHECK: ret i1 %C
}
define i1 @lt_unsigned_to_small_negative(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp slt i32 %Y, -17 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 false
}
define i1 @gt_signed_to_large_unsigned(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp ugt i32 %Y, 1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: %C = icmp slt i8 %SB, 0
+; CHECK: ret i1 %C
}
define i1 @gt_signed_to_large_signed(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp sgt i32 %Y, 1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 false
}
define i1 @gt_signed_to_large_negative(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp sgt i32 %Y, -1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 true
}
+
define i1 @gt_signed_to_small_signed(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp sgt i32 %Y, 17 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: %C = icmp sgt i8 %SB, 17
+; CHECK: ret i1 %C
}
define i1 @gt_signed_to_small_negative(i8 %SB) {
%Y = sext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp sgt i32 %Y, -17 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: %C = icmp sgt i8 %SB, -17
+; CHECK: ret i1 %C
}
define i1 @gt_unsigned_to_large_unsigned(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp ugt i32 %Y, 1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 false
}
define i1 @gt_unsigned_to_large_signed(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp sgt i32 %Y, 1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 false
}
define i1 @gt_unsigned_to_large_negative(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp sgt i32 %Y, -1024 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 true
}
define i1 @gt_unsigned_to_small_unsigned(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp ugt i32 %Y, 17 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: %C = icmp ugt i8 %SB, 17
+; CHECK: ret i1 %C
}
define i1 @gt_unsigned_to_small_negative(i8 %SB) {
%Y = zext i8 %SB to i32 ; <i32> [#uses=1]
%C = icmp sgt i32 %Y, -17 ; <i1> [#uses=1]
ret i1 %C
+; CHECK: ret i1 true
}
diff --git a/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll b/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll
index 23ebe92..c337ea7 100644
--- a/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll
+++ b/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll
@@ -1,11 +1,13 @@
-; RUN: opt < %s -instcombine -S | grep shl
-; RUN: opt < %s -instcombine -S | notcast
+; RUN: opt < %s -instcombine -S | FileCheck %s
; This cannot be turned into a sign extending cast!
define i64 @test(i64 %X) {
%Y = shl i64 %X, 16 ; <i64> [#uses=1]
+; CHECK: %Y = shl i64 %X, 16
%Z = ashr i64 %Y, 16 ; <i64> [#uses=1]
+; CHECK: %Z = ashr i64 %Y, 16
ret i64 %Z
+; CHECK: ret i64 %Z
}
diff --git a/test/Transforms/InstCombine/2008-01-21-MismatchedCastAndCompare.ll b/test/Transforms/InstCombine/2008-01-21-MismatchedCastAndCompare.ll
index be19bcc..5ff23a3 100644
--- a/test/Transforms/InstCombine/2008-01-21-MismatchedCastAndCompare.ll
+++ b/test/Transforms/InstCombine/2008-01-21-MismatchedCastAndCompare.ll
@@ -1,5 +1,4 @@
-; RUN: opt < %s -instcombine -S | notcast
-; RUN: opt < %s -instcombine -S | not grep {icmp s}
+; RUN: opt < %s -instcombine -S | FileCheck %s
; PR1940
define i1 @test1(i8 %A, i8 %B) {
@@ -7,6 +6,8 @@ define i1 @test1(i8 %A, i8 %B) {
%b = zext i8 %B to i32
%c = icmp sgt i32 %a, %b
ret i1 %c
+; CHECK: %c = icmp ugt i8 %A, %B
+; CHECK: ret i1 %c
}
define i1 @test2(i8 %A, i8 %B) {
@@ -14,4 +15,6 @@ define i1 @test2(i8 %A, i8 %B) {
%b = sext i8 %B to i32
%c = icmp ugt i32 %a, %b
ret i1 %c
+; CHECK: %c = icmp ugt i8 %A, %B
+; CHECK: ret i1 %c
}
diff --git a/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll b/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll
index 13f3d9f..a49829a 100644
--- a/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll
+++ b/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll
@@ -1,11 +1,15 @@
-; RUN: opt < %s -instcombine -S | notcast
+; RUN: opt < %s -instcombine -S | FileCheck %s
define i16 @test1(i16 %a) {
%tmp = zext i16 %a to i32 ; <i32> [#uses=2]
%tmp21 = lshr i32 %tmp, 8 ; <i32> [#uses=1]
+; CHECK: %tmp21 = lshr i16 %a, 8
%tmp5 = mul i32 %tmp, 5 ; <i32> [#uses=1]
+; CHECK: %tmp5 = mul i16 %a, 5
%tmp.upgrd.32 = or i32 %tmp21, %tmp5 ; <i32> [#uses=1]
+; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
%tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16 ; <i16> [#uses=1]
ret i16 %tmp.upgrd.3
+; CHECK: ret i16 %tmp.upgrd.32
}
diff --git a/test/Transforms/InstCombine/zext.ll b/test/Transforms/InstCombine/zext.ll
index 9aacd3a..420cb4a 100644
--- a/test/Transforms/InstCombine/zext.ll
+++ b/test/Transforms/InstCombine/zext.ll
@@ -1,11 +1,13 @@
; Tests to make sure elimination of casts is working correctly
-; RUN: opt < %s -instcombine -S | \
-; RUN: notcast {} {%c1.*}
+; RUN: opt < %s -instcombine -S | FileCheck %s
define i64 @test_sext_zext(i16 %A) {
%c1 = zext i16 %A to i32 ; <i32> [#uses=1]
%c2 = sext i32 %c1 to i64 ; <i64> [#uses=1]
ret i64 %c2
+CHECK-NOT: %c1
+CHECK: %c2 = zext i16 %A to i64
+CHECK: ret i64 %c2
}
; PR3599
@@ -29,5 +31,6 @@ entry:
%tmp16 = or i32 %tmp15, %tmp6 ; <i32> [#uses=1]
%tmp17 = or i32 %tmp16, %tmp3 ; <i32> [#uses=1]
ret i32 %tmp17
+CHECK: ret i1 true
}