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author | Richard Barton <richard.barton@arm.com> | 2012-07-09 18:30:56 +0000 |
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committer | Richard Barton <richard.barton@arm.com> | 2012-07-09 18:30:56 +0000 |
commit | 874b863f2ab9158db6f7f1b773b77e6334e31c41 (patch) | |
tree | de2dfb8f1a66f82726b817a22a5921a565aa491f | |
parent | 83cfff6229c4afe9af9d48d4109df9a503233a7c (diff) | |
download | external_llvm-874b863f2ab9158db6f7f1b773b77e6334e31c41.zip external_llvm-874b863f2ab9158db6f7f1b773b77e6334e31c41.tar.gz external_llvm-874b863f2ab9158db6f7f1b773b77e6334e31c41.tar.bz2 |
Some formatting to keep Clang happy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159948 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 7901253..4497720 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -7300,8 +7300,8 @@ processInstruction(MCInst &Inst, if ((isARMLowRegister(Inst.getOperand(1).getReg()) && isARMLowRegister(Inst.getOperand(2).getReg())) && Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() && - (!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR || - inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) && + ((!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR) || + (inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR)) && (!static_cast<ARMOperand*>(Operands[3])->isToken() || !static_cast<ARMOperand*>(Operands[3])->getToken().equals_lower(".w"))) { unsigned NewOpc; @@ -7339,8 +7339,8 @@ processInstruction(MCInst &Inst, isARMLowRegister(Inst.getOperand(2).getReg())) && (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() || Inst.getOperand(0).getReg() == Inst.getOperand(2).getReg()) && - (!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR || - inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) && + ((!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR) || + (inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR)) && (!static_cast<ARMOperand*>(Operands[3])->isToken() || !static_cast<ARMOperand*>(Operands[3])->getToken().equals_lower(".w"))) { unsigned NewOpc; |