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authorNAKAMURA Takumi <geek4civic@gmail.com>2012-03-09 14:52:44 +0000
committerNAKAMURA Takumi <geek4civic@gmail.com>2012-03-09 14:52:44 +0000
commit89d8139d3706270ec99b3722f273a34af61b4644 (patch)
tree93783823789b6e6380e9c68b4c2cdc397b4bd209
parent63054f99af1fd013322e8081227b29656d49a2d2 (diff)
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TableGen/CodeEmitterGen.cpp: Fix an expression of generating bitmask.
~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152407 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--utils/TableGen/CodeEmitterGen.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 91d8446..3943e8a 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -163,7 +163,7 @@ AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
--bit;
}
- uint64_t opMask = ~0U >> (64-N);
+ uint64_t opMask = ~(uint64_t)0 >> (64-N);
int opShift = beginVarBit - N + 1;
opMask <<= opShift;
opShift = beginInstBit - beginVarBit;