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| author | Chris Lattner <sabre@nondot.org> | 2003-10-18 05:55:58 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-10-18 05:55:58 +0000 |
| commit | 8ad3946d74852609960522d64355507eeb16483a (patch) | |
| tree | 7b2f20709e0c993928b59d415f2f812a63f4a7d6 | |
| parent | 4c6654963dfa4b91c702a913f3715c4a207472d2 (diff) | |
| download | external_llvm-8ad3946d74852609960522d64355507eeb16483a.zip external_llvm-8ad3946d74852609960522d64355507eeb16483a.tar.gz external_llvm-8ad3946d74852609960522d64355507eeb16483a.tar.bz2 | |
Update the sparc backend to at least compile correctly with the new varargs stuff even if it's not all implemented yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9223 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/SparcV9/SparcV9.burg.in | 8 | ||||
| -rw-r--r-- | lib/Target/SparcV9/SparcV9InstrSelection.cpp | 12 |
2 files changed, 16 insertions, 4 deletions
diff --git a/lib/Target/SparcV9/SparcV9.burg.in b/lib/Target/SparcV9/SparcV9.burg.in index ccb3948..dcef111 100644 --- a/lib/Target/SparcV9/SparcV9.burg.in +++ b/lib/Target/SparcV9/SparcV9.burg.in @@ -87,8 +87,9 @@ Xdefine PANIC printf %term Call=CallOPCODE %term Shl=ShlOPCODE %term Shr=ShrOPCODE -%term VaArg=VarArgOPCODE - /* 32...46 are unused */ +%term VANext=VANextOPCODE +%term VAArg=VAArgOPCODE + /* 33...46 are unused */ /* * The foll. values should match the constants in InstrForest.h */ @@ -258,7 +259,8 @@ reg: Call = 61 (20); /* just ignore the operands! */ reg: Shl(reg,reg) = 62 (20); /* 1 for issue restrictions */ reg: Shr(reg,reg) = 63 (20); /* 1 for issue restrictions */ reg: Phi(reg,reg) = 64 (0); -reg: VaArg(reg) = 65 (40); /* load from stack then incr */ +reg: VANext(reg) = 65 (40); /* incr stack slot pointer */ +reg: VAArg(reg) = 66 (40); /* get a vararg */ /* * Finally, leaf nodes of expression trees. diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp index 153bfc3..9633b31 100644 --- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp +++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp @@ -1408,6 +1408,9 @@ bool CodeGenIntrinsic(LLVMIntrinsic::ID iid, CallInst &callInstr, { switch (iid) { case LLVMIntrinsic::va_start: { + // FIXME: this needs to be updated! + abort(); + // Get the address of the first vararg value on stack and copy it to // the argument of va_start(va_list* ap). bool ignore; @@ -1426,6 +1429,9 @@ bool CodeGenIntrinsic(LLVMIntrinsic::ID iid, CallInst &callInstr, return true; // no-op on Sparc case LLVMIntrinsic::va_copy: + // FIXME: this needs to be updated! + abort(); + // Simple copy of current va_list (arg2) to new va_list (arg1) mvec.push_back(BuildMI(V9::ORr, 3). addMReg(target.getRegInfo().getZeroRegNum()). @@ -2829,8 +2835,11 @@ GetInstructionsByRule(InstructionNode* subtreeRoot, case 64: // reg: Phi(reg,reg) break; // don't forward the value - case 65: // reg: VaArg(reg): the va_arg instruction + case 65: // reg: VANext(reg): the va_next instruction + case 66: // reg: VAArg (reg): the va_arg instruction { + abort(); // FIXME: This is incorrect! +#if 0 // Use value initialized by va_start as pointer to args on the stack. // Load argument via current pointer value, then increment pointer. int argSize = target.getFrameInfo().getSizeOfEachArgOnStack(); @@ -2842,6 +2851,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot, mvec.push_back(BuildMI(V9::ADDi, 3).addReg(vaArgI->getOperand(0)). addSImm(argSize).addRegDef(vaArgI->getOperand(0))); break; +#endif } case 71: // reg: VReg |