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authorEli Friedman <eli.friedman@gmail.com>2009-07-18 09:53:21 +0000
committerEli Friedman <eli.friedman@gmail.com>2009-07-18 09:53:21 +0000
commit8be17397c08cf768f33016f42e6a75a3f214d331 (patch)
tree1972f98ba5af2f77dc9957c02efb1fc0e80874e1
parent191a0aee4f58f86d697e9eed57205a59e3920b4d (diff)
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Add combine: X sdiv (1 << Y) -> X udiv (1 << Y) when X doesn't have the
sign bit set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76304 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/InstructionCombining.cpp19
-rw-r--r--test/Transforms/InstCombine/sdiv-shift.ll9
2 files changed, 24 insertions, 4 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 0c010cf..e9e5294 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -3104,11 +3104,22 @@ Instruction *InstCombiner::visitSDiv(BinaryOperator &I) {
// unsigned inputs), turn this into a udiv.
if (I.getType()->isInteger()) {
APInt Mask(APInt::getSignBit(I.getType()->getPrimitiveSizeInBits()));
- if (MaskedValueIsZero(Op1, Mask) && MaskedValueIsZero(Op0, Mask)) {
- // X sdiv Y -> X udiv Y, iff X and Y don't have sign bit set
- return BinaryOperator::CreateUDiv(Op0, Op1, I.getName());
+ if (MaskedValueIsZero(Op0, Mask)) {
+ if (MaskedValueIsZero(Op1, Mask)) {
+ // X sdiv Y -> X udiv Y, iff X and Y don't have sign bit set
+ return BinaryOperator::CreateUDiv(Op0, Op1, I.getName());
+ }
+ ConstantInt *ShiftedInt;
+ if (match(Op1, m_Shl(m_ConstantInt(ShiftedInt), m_Value()), *Context) &&
+ ShiftedInt->getValue().isPowerOf2()) {
+ // X sdiv (1 << Y) -> X udiv (1 << Y) ( -> X u>> Y)
+ // Safe because the only negative value (1 << Y) can take on is
+ // INT_MIN, and X sdiv INT_MIN == X udiv INT_MIN == 0 if X doesn't have
+ // the sign bit set.
+ return BinaryOperator::CreateUDiv(Op0, Op1, I.getName());
+ }
}
- }
+ }
return 0;
}
diff --git a/test/Transforms/InstCombine/sdiv-shift.ll b/test/Transforms/InstCombine/sdiv-shift.ll
new file mode 100644
index 0000000..3fba05d
--- /dev/null
+++ b/test/Transforms/InstCombine/sdiv-shift.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep div
+
+define i32 @a(i16 zeroext %x, i32 %y) nounwind {
+entry:
+ %conv = zext i16 %x to i32
+ %s = shl i32 2, %y
+ %d = sdiv i32 %conv, %s
+ ret i32 %d
+}