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authorNate Begeman <natebegeman@mac.com>2004-09-28 21:29:00 +0000
committerNate Begeman <natebegeman@mac.com>2004-09-28 21:29:00 +0000
commit8d5c50329b00324c838e1fa28b5b7f0bc834176d (patch)
treed95cf215d9c59b8aa457a571e6f226c3e1543198
parentcdd66b524f62ef6acd6bfa4e586edf8a406c4928 (diff)
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Add support for the isLoad and isStore flags, needed by the instruction scheduler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16555 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/Target.td2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 780cf60..7219395 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -130,6 +130,8 @@ class Instruction {
bit isBranch = 0; // Is this instruction a branch instruction?
bit isBarrier = 0; // Can control flow fall through this instruction?
bit isCall = 0; // Is this instruction a call instruction?
+ bit isLoad = 0; // Is this instruction a load instruction?
+ bit isStore = 0; // Is this instruction a store instruction?
bit isTwoAddress = 0; // Is this a two address instruction?
bit isTerminator = 0; // Is this part of the terminator for a basic block?
bit hasDelaySlot = 0; // Does this instruction have an delay slot?