diff options
author | Chris Lattner <sabre@nondot.org> | 2009-08-15 17:21:44 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2009-08-15 17:21:44 +0000 |
commit | 8e1fad4bb738c89b1a52c387441122cf8531fc51 (patch) | |
tree | c0e0bc65c9d8fbf6496db53b3551ea1f15fd0a1c | |
parent | 075ee999d34a6824880a2524123979c344d9bc6e (diff) | |
download | external_llvm-8e1fad4bb738c89b1a52c387441122cf8531fc51.zip external_llvm-8e1fad4bb738c89b1a52c387441122cf8531fc51.tar.gz external_llvm-8e1fad4bb738c89b1a52c387441122cf8531fc51.tar.bz2 |
merge a bunch more sse3 tests into sse3.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79115 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | test/CodeGen/X86/sse3.ll | 254 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-12.ll | 28 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-13.ll | 21 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-2.ll | 47 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-21.ll | 21 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-28.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-31.ll | 5 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-32.ll | 13 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-33.ll | 11 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-34.ll | 8 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-37.ll | 14 |
11 files changed, 252 insertions, 174 deletions
diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll index 5e7908c..013bdbb 100644 --- a/test/CodeGen/X86/sse3.ll +++ b/test/CodeGen/X86/sse3.ll @@ -5,7 +5,7 @@ ; Test for v8xi16 lowering where we extract the first element of the vector and ; placed it in the second element of the result. -define void @shuf1(<8 x i16>* %dest, <8 x i16>* %old) nounwind { +define void @t0(<8 x i16>* %dest, <8 x i16>* %old) nounwind { entry: %tmp3 = load <8 x i16>* %old %tmp6 = shufflevector <8 x i16> %tmp3, @@ -14,11 +14,259 @@ entry: store <8 x i16> %tmp6, <8 x i16>* %dest ret void -; X64: shuf1: +; X64: t0: ; X64: movddup (%rsi), %xmm0 ; X64: pshuflw $0, %xmm0, %xmm0 ; X64: xorl %eax, %eax ; X64: pinsrw $0, %eax, %xmm0 ; X64: movaps %xmm0, (%rdi) ; X64: ret -}
\ No newline at end of file +} + +define <8 x i16> @t1(<8 x i16>* %A, <8 x i16>* %B) nounwind { + %tmp1 = load <8 x i16>* %A + %tmp2 = load <8 x i16>* %B + %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > + ret <8 x i16> %tmp3 + +; X64: t1: +; X64: movl (%rsi), %eax +; X64: movaps (%rdi), %xmm0 +; X64: pinsrw $0, %eax, %xmm0 +; X64: ret +} + +define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 9, i32 1, i32 2, i32 9, i32 4, i32 5, i32 6, i32 7 > + ret <8 x i16> %tmp +; X64: t2: +; X64: pextrw $1, %xmm1, %eax +; X64: pinsrw $0, %eax, %xmm0 +; X64: pinsrw $3, %eax, %xmm0 +; X64: ret +} + +define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %A, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 > + ret <8 x i16> %tmp +; X64: t3: +; X64: pextrw $5, %xmm0, %eax +; X64: pshuflw $44, %xmm0, %xmm0 +; X64: pshufhw $27, %xmm0, %xmm0 +; X64: pinsrw $3, %eax, %xmm0 +; X64: ret +} + +define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 > + ret <8 x i16> %tmp +; X64: t4: +; X64: pextrw $7, %xmm0, %eax +; X64: pshufhw $100, %xmm0, %xmm1 +; X64: pinsrw $1, %eax, %xmm1 +; X64: pextrw $1, %xmm0, %eax +; X64: movaps %xmm1, %xmm0 +; X64: pinsrw $4, %eax, %xmm0 +; X64: ret +} + +define <8 x i16> @t5(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 0, i32 1, i32 10, i32 11, i32 2, i32 3 > + ret <8 x i16> %tmp +; X64: t5: +; X64: movlhps %xmm1, %xmm0 +; X64: pshufd $114, %xmm0, %xmm0 +; X64: ret +} + +define <8 x i16> @t6(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > + ret <8 x i16> %tmp +; X64: t6: +; X64: movss %xmm1, %xmm0 +; X64: ret +} + +define <8 x i16> @t7(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 0, i32 3, i32 2, i32 4, i32 6, i32 4, i32 7 > + ret <8 x i16> %tmp +; X64: t7: +; X64: pshuflw $176, %xmm0, %xmm0 +; X64: pshufhw $200, %xmm0, %xmm0 +; X64: ret +} + +define void @t8(<2 x i64>* %res, <2 x i64>* %A) nounwind { + %tmp = load <2 x i64>* %A + %tmp.upgrd.1 = bitcast <2 x i64> %tmp to <8 x i16> + %tmp0 = extractelement <8 x i16> %tmp.upgrd.1, i32 0 + %tmp1 = extractelement <8 x i16> %tmp.upgrd.1, i32 1 + %tmp2 = extractelement <8 x i16> %tmp.upgrd.1, i32 2 + %tmp3 = extractelement <8 x i16> %tmp.upgrd.1, i32 3 + %tmp4 = extractelement <8 x i16> %tmp.upgrd.1, i32 4 + %tmp5 = extractelement <8 x i16> %tmp.upgrd.1, i32 5 + %tmp6 = extractelement <8 x i16> %tmp.upgrd.1, i32 6 + %tmp7 = extractelement <8 x i16> %tmp.upgrd.1, i32 7 + %tmp8 = insertelement <8 x i16> undef, i16 %tmp2, i32 0 + %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 1 + %tmp10 = insertelement <8 x i16> %tmp9, i16 %tmp0, i32 2 + %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 3 + %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp6, i32 4 + %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 5 + %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp4, i32 6 + %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 7 + %tmp15.upgrd.2 = bitcast <8 x i16> %tmp15 to <2 x i64> + store <2 x i64> %tmp15.upgrd.2, <2 x i64>* %res + ret void +; X64: t8: +; X64: pshuflw $198, (%rsi), %xmm0 +; X64: pshufhw $198, %xmm0, %xmm0 +; X64: movaps %xmm0, (%rdi) +; X64: ret +} + +define void @t9(<4 x float>* %r, <2 x i32>* %A) nounwind { + %tmp = load <4 x float>* %r + %tmp.upgrd.3 = bitcast <2 x i32>* %A to double* + %tmp.upgrd.4 = load double* %tmp.upgrd.3 + %tmp.upgrd.5 = insertelement <2 x double> undef, double %tmp.upgrd.4, i32 0 + %tmp5 = insertelement <2 x double> %tmp.upgrd.5, double undef, i32 1 + %tmp6 = bitcast <2 x double> %tmp5 to <4 x float> + %tmp.upgrd.6 = extractelement <4 x float> %tmp, i32 0 + %tmp7 = extractelement <4 x float> %tmp, i32 1 + %tmp8 = extractelement <4 x float> %tmp6, i32 0 + %tmp9 = extractelement <4 x float> %tmp6, i32 1 + %tmp10 = insertelement <4 x float> undef, float %tmp.upgrd.6, i32 0 + %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, i32 1 + %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, i32 2 + %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3 + store <4 x float> %tmp13, <4 x float>* %r + ret void +; X64: t9: +; X64: movsd (%rsi), %xmm0 +; X64: movhps %xmm0, (%rdi) +; X64: ret +} + + + +; FIXME: This testcase produces icky code. It can be made much better! +; PR2585 + +@g1 = external constant <4 x i32> +@g2 = external constant <4 x i16> + +define internal void @t10() nounwind { + load <4 x i32>* @g1, align 16 + bitcast <4 x i32> %1 to <8 x i16> + shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef > + bitcast <8 x i16> %3 to <2 x i64> + extractelement <2 x i64> %4, i32 0 + bitcast i64 %5 to <4 x i16> + store <4 x i16> %6, <4 x i16>* @g2, align 8 + ret void +; X64: t10: +; X64: movq _g1@GOTPCREL(%rip), %rax +; X64: movaps (%rax), %xmm0 +; X64: pextrw $4, %xmm0, %eax +; X64: movaps %xmm0, %xmm1 +; X64: movlhps %xmm1, %xmm1 +; X64: pshuflw $8, %xmm1, %xmm1 +; X64: pinsrw $2, %eax, %xmm1 +; X64: pextrw $6, %xmm0, %eax +; X64: pinsrw $3, %eax, %xmm1 +; X64: movq _g2@GOTPCREL(%rip), %rax +; X64: movq %xmm1, (%rax) +; X64: ret +} + + +; Pack various elements via shuffles. +define <8 x i16> @t11(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp7 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > + ret <8 x i16> %tmp7 + +; X64: t11: +; X64: movd %xmm1, %eax +; X64: movlhps %xmm0, %xmm0 +; X64: pshuflw $1, %xmm0, %xmm0 +; X64: pinsrw $1, %eax, %xmm0 +; X64: ret +} + + +define <8 x i16> @t12(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef > + ret <8 x i16> %tmp9 + +; X64: t12: +; X64: pextrw $3, %xmm1, %eax +; X64: movlhps %xmm0, %xmm0 +; X64: pshufhw $3, %xmm0, %xmm0 +; X64: pinsrw $5, %eax, %xmm0 +; X64: ret +} + + +define <8 x i16> @t13(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef > + ret <8 x i16> %tmp9 +; X64: t13: +; X64: punpcklqdq %xmm0, %xmm1 +; X64: pextrw $3, %xmm1, %eax +; X64: pshufd $52, %xmm1, %xmm0 +; X64: pinsrw $4, %eax, %xmm0 +; X64: ret +} + + +define <8 x i16> @t14(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef > + ret <8 x i16> %tmp9 +; X64: t14: +; X64: punpcklqdq %xmm0, %xmm1 +; X64: pshufhw $8, %xmm1, %xmm0 +; X64: ret +} + + + +define <8 x i16> @t15(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef > + ret <8 x i16> %tmp8 +; X64: t15: +; X64: pextrw $7, %xmm0, %eax +; X64: punpcklqdq %xmm1, %xmm0 +; X64: pshuflw $128, %xmm0, %xmm0 +; X64: pinsrw $2, %eax, %xmm0 +; X64: ret +} + + +; Test yonah where we convert a shuffle to pextrw and pinrsw +define <16 x i8> @t16(<16 x i8> %T0) nounwind readnone { +entry: + %tmp8 = shufflevector <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > + %tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 2, i32 17, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > + ret <16 x i8> %tmp9 +; X64: t16: +; X64: movaps LCPI17_0(%rip), %xmm1 +; X64: movd %xmm1, %eax +; X64: pinsrw $0, %eax, %xmm1 +; X64: pextrw $8, %xmm0, %eax +; X64: pinsrw $1, %eax, %xmm1 +; X64: pextrw $1, %xmm1, %ecx +; X64: movd %xmm1, %edx +; X64: pinsrw $0, %edx, %xmm1 +; X64: movzbl %cl, %ecx +; X64: andw $65280, %ax +; X64: orw %cx, %ax +; X64: movaps %xmm1, %xmm0 +; X64: pinsrw $1, %eax, %xmm0 +; X64: ret +} diff --git a/test/CodeGen/X86/vec_shuffle-12.ll b/test/CodeGen/X86/vec_shuffle-12.ll deleted file mode 100644 index 98b455a..0000000 --- a/test/CodeGen/X86/vec_shuffle-12.ll +++ /dev/null @@ -1,28 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah > %t -; RUN: not grep punpck %t -; RUN: grep pextrw %t | count 4 -; RUN: grep pinsrw %t | count 6 -; RUN: grep pshuflw %t | count 1 -; RUN: grep pshufhw %t | count 2 - -define <8 x i16> @t1(<8 x i16>* %A, <8 x i16>* %B) nounwind { - %tmp1 = load <8 x i16>* %A - %tmp2 = load <8 x i16>* %B - %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > - ret <8 x i16> %tmp3 -} - -define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind { - %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 9, i32 1, i32 2, i32 9, i32 4, i32 5, i32 6, i32 7 > - ret <8 x i16> %tmp -} - -define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind { - %tmp = shufflevector <8 x i16> %A, <8 x i16> %A, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 > - ret <8 x i16> %tmp -} - -define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind { - %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 > - ret <8 x i16> %tmp -} diff --git a/test/CodeGen/X86/vec_shuffle-13.ll b/test/CodeGen/X86/vec_shuffle-13.ll deleted file mode 100644 index 61cd128..0000000 --- a/test/CodeGen/X86/vec_shuffle-13.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah > %t -; RUN: grep movlhps %t | count 1 -; RUN: grep pshufd %t | count 1 -; RUN: grep movss %t | count 1 -; RUN: grep pshuflw %t | count 1 -; RUN: grep pshufhw %t | count 1 - -define <8 x i16> @t1(<8 x i16> %A, <8 x i16> %B) nounwind { - %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 0, i32 1, i32 10, i32 11, i32 2, i32 3 > - ret <8 x i16> %tmp -} - -define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind { - %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > - ret <8 x i16> %tmp -} - -define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind { - %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 0, i32 3, i32 2, i32 4, i32 6, i32 4, i32 7 > - ret <8 x i16> %tmp -} diff --git a/test/CodeGen/X86/vec_shuffle-2.ll b/test/CodeGen/X86/vec_shuffle-2.ll deleted file mode 100644 index b049565..0000000 --- a/test/CodeGen/X86/vec_shuffle-2.ll +++ /dev/null @@ -1,47 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep pshufhw %t | count 1 -; RUN: grep pshuflw %t | count 1 -; RUN: grep movhps %t | count 1 - -define void @test1(<2 x i64>* %res, <2 x i64>* %A) nounwind { - %tmp = load <2 x i64>* %A ; <<2 x i64>> [#uses=1] - %tmp.upgrd.1 = bitcast <2 x i64> %tmp to <8 x i16> ; <<8 x i16>> [#uses=8] - %tmp0 = extractelement <8 x i16> %tmp.upgrd.1, i32 0 ; <i16> [#uses=1] - %tmp1 = extractelement <8 x i16> %tmp.upgrd.1, i32 1 ; <i16> [#uses=1] - %tmp2 = extractelement <8 x i16> %tmp.upgrd.1, i32 2 ; <i16> [#uses=1] - %tmp3 = extractelement <8 x i16> %tmp.upgrd.1, i32 3 ; <i16> [#uses=1] - %tmp4 = extractelement <8 x i16> %tmp.upgrd.1, i32 4 ; <i16> [#uses=1] - %tmp5 = extractelement <8 x i16> %tmp.upgrd.1, i32 5 ; <i16> [#uses=1] - %tmp6 = extractelement <8 x i16> %tmp.upgrd.1, i32 6 ; <i16> [#uses=1] - %tmp7 = extractelement <8 x i16> %tmp.upgrd.1, i32 7 ; <i16> [#uses=1] - %tmp8 = insertelement <8 x i16> undef, i16 %tmp2, i32 0 ; <<8 x i16>> [#uses=1] - %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 1 ; <<8 x i16>> [#uses=1] - %tmp10 = insertelement <8 x i16> %tmp9, i16 %tmp0, i32 2 ; <<8 x i16>> [#uses=1] - %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 3 ; <<8 x i16>> [#uses=1] - %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp6, i32 4 ; <<8 x i16>> [#uses=1] - %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 5 ; <<8 x i16>> [#uses=1] - %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp4, i32 6 ; <<8 x i16>> [#uses=1] - %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 7 ; <<8 x i16>> [#uses=1] - %tmp15.upgrd.2 = bitcast <8 x i16> %tmp15 to <2 x i64> ; <<2 x i64>> [#uses=1] - store <2 x i64> %tmp15.upgrd.2, <2 x i64>* %res - ret void -} - -define void @test2(<4 x float>* %r, <2 x i32>* %A) nounwind { - %tmp = load <4 x float>* %r ; <<4 x float>> [#uses=2] - %tmp.upgrd.3 = bitcast <2 x i32>* %A to double* ; <double*> [#uses=1] - %tmp.upgrd.4 = load double* %tmp.upgrd.3 ; <double> [#uses=1] - %tmp.upgrd.5 = insertelement <2 x double> undef, double %tmp.upgrd.4, i32 0 ; <<2 x double>> [#uses=1] - %tmp5 = insertelement <2 x double> %tmp.upgrd.5, double undef, i32 1 ; <<2 x double>> [#uses=1] - %tmp6 = bitcast <2 x double> %tmp5 to <4 x float> ; <<4 x float>> [#uses=2] - %tmp.upgrd.6 = extractelement <4 x float> %tmp, i32 0 ; <float> [#uses=1] - %tmp7 = extractelement <4 x float> %tmp, i32 1 ; <float> [#uses=1] - %tmp8 = extractelement <4 x float> %tmp6, i32 0 ; <float> [#uses=1] - %tmp9 = extractelement <4 x float> %tmp6, i32 1 ; <float> [#uses=1] - %tmp10 = insertelement <4 x float> undef, float %tmp.upgrd.6, i32 0 ; <<4 x float>> [#uses=1] - %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, i32 1 ; <<4 x float>> [#uses=1] - %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, i32 2 ; <<4 x float>> [#uses=1] - %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3 ; <<4 x float>> [#uses=1] - store <4 x float> %tmp13, <4 x float>* %r - ret void -} diff --git a/test/CodeGen/X86/vec_shuffle-21.ll b/test/CodeGen/X86/vec_shuffle-21.ll deleted file mode 100644 index eec2691..0000000 --- a/test/CodeGen/X86/vec_shuffle-21.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep pshuflw %t | count 1 -; RUN: grep pextrw %t | count 2 -; RUN: grep pinsrw %t | count 2 -; PR2585 - -; FIXME: This testcase produces icky code. It can be made much better! - -external constant <4 x i32> ; <<4 x i32>*>:0 [#uses=1] -external constant <4 x i16> ; <<4 x i16>*>:1 [#uses=1] - -define internal void @""() { - load <4 x i32>* @0, align 16 ; <<4 x i32>>:1 [#uses=1] - bitcast <4 x i32> %1 to <8 x i16> ; <<8 x i16>>:2[#uses=1] - shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef > ; <<8x i16>>:3 [#uses=1] - bitcast <8 x i16> %3 to <2 x i64> ; <<2 x i64>>:4 [#uses=1] - extractelement <2 x i64> %4, i32 0 ; <i64>:5 [#uses=1] - bitcast i64 %5 to <4 x i16> ; <<4 x i16>>:6 [#uses=1] - store <4 x i16> %6, <4 x i16>* @1, align 8 - ret void -} diff --git a/test/CodeGen/X86/vec_shuffle-28.ll b/test/CodeGen/X86/vec_shuffle-28.ll index f7e5001..fbd5bf5 100644 --- a/test/CodeGen/X86/vec_shuffle-28.ll +++ b/test/CodeGen/X86/vec_shuffle-28.ll @@ -1,7 +1,3 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep movd %t | count 1 -; RUN: grep pshuflw %t | count 1 -; RUN: grep pinsrw %t | count 1 ; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f ; RUN: grep pshufb %t | count 1 diff --git a/test/CodeGen/X86/vec_shuffle-31.ll b/test/CodeGen/X86/vec_shuffle-31.ll index efcd030..b57ea4e 100644 --- a/test/CodeGen/X86/vec_shuffle-31.ll +++ b/test/CodeGen/X86/vec_shuffle-31.ll @@ -1,8 +1,3 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep pextrw %t | count 1 -; RUN: grep movlhps %t | count 1 -; RUN: grep pshufhw %t | count 1 -; RUN: grep pinsrw %t | count 1 ; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f ; RUN: grep pshufb %t | count 1 diff --git a/test/CodeGen/X86/vec_shuffle-32.ll b/test/CodeGen/X86/vec_shuffle-32.ll deleted file mode 100644 index 3a81948..0000000 --- a/test/CodeGen/X86/vec_shuffle-32.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep punpcklqdq %t | count 1 -; RUN: grep pextrw %t | count 1 -; RUN: grep pshufd %t | count 1 -; RUN: grep pinsrw %t | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f -; RUN: grep pshufb %t | count 1 - -define <8 x i16> @shuf4(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { -entry: - %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef > - ret <8 x i16> %tmp9 -} diff --git a/test/CodeGen/X86/vec_shuffle-33.ll b/test/CodeGen/X86/vec_shuffle-33.ll deleted file mode 100644 index e3d6304..0000000 --- a/test/CodeGen/X86/vec_shuffle-33.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep punpcklqdq %t | count 1 -; RUN: grep pshufhw %t | count 1 -; RUN: not grep pextrw %t -; RUN: not grep pinsrw %t - -define <8 x i16> @shuf5(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { -entry: - %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef > - ret <8 x i16> %tmp9 -} diff --git a/test/CodeGen/X86/vec_shuffle-34.ll b/test/CodeGen/X86/vec_shuffle-34.ll index 99c95d1..6123602 100644 --- a/test/CodeGen/X86/vec_shuffle-34.ll +++ b/test/CodeGen/X86/vec_shuffle-34.ll @@ -1,10 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep pextrw %t | count 1 -; RUN: grep punpcklqdq %t | count 1 -; RUN: grep pshuflw %t | count 1 -; RUN: grep pinsrw %t | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f -; RUN: grep pshufb %t | count 2 +; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 | grep pshufb | count 2 define <8 x i16> @shuf2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { entry: diff --git a/test/CodeGen/X86/vec_shuffle-37.ll b/test/CodeGen/X86/vec_shuffle-37.ll deleted file mode 100644 index d5f21f5..0000000 --- a/test/CodeGen/X86/vec_shuffle-37.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -stack-alignment=16 -o %t -f -; RUN: grep pextrw %t | count 2 -; RUN: grep pinsrw %t | count 4 -; RUN: grep orw %t | count 1 -; RUN: grep andw %t | count 1 - -; Test yonah where we convert a shuffle to pextrw and pinrsw -define <16 x i8> @shuf1(<16 x i8> %T0) nounwind readnone { -entry: - %tmp8 = shufflevector <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > - %tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 2, i32 17, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > - ret <16 x i8> %tmp9 -} - |