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| author | Jim Grosbach <grosbach@apple.com> | 2010-10-14 23:29:18 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-14 23:29:18 +0000 |
| commit | 8faff9c759f8d87cfb4f0cb604d1dbc9842ae07b (patch) | |
| tree | 71abbd774e8e92fce46158087d71ca91ed63182e | |
| parent | 58456c0b041f47734a990030eff205a4f429f1da (diff) | |
| download | external_llvm-8faff9c759f8d87cfb4f0cb604d1dbc9842ae07b.zip external_llvm-8faff9c759f8d87cfb4f0cb604d1dbc9842ae07b.tar.gz external_llvm-8faff9c759f8d87cfb4f0cb604d1dbc9842ae07b.tar.bz2 | |
Add testcase for RRX and ASRS (which effectively tests MOVs, since those
are just forms of that instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116538 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/MC/ARM/simple-encoding.ll | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/test/MC/ARM/simple-encoding.ll b/test/MC/ARM/simple-encoding.ll index a165160..00522da 100644 --- a/test/MC/ARM/simple-encoding.ll +++ b/test/MC/ARM/simple-encoding.ll @@ -90,5 +90,13 @@ entry: ret i32 42405 } +define i64 @f10(i64 %a) nounwind readnone ssp { +entry: +; CHECK: f10 +; CHECK: asrs r1, r1, #1 @ encoding: [0xc1,0x10,0xb0,0xe1] +; CHECK: rrx r0, r0 @ encoding: [0x60,0x00,0xa0,0xe1] + %shr = ashr i64 %a, 1 + ret i64 %shr +} declare void @llvm.trap() nounwind |