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| author | David Goodwin <david_goodwin@apple.com> | 2009-07-28 18:15:38 +0000 |
|---|---|---|
| committer | David Goodwin <david_goodwin@apple.com> | 2009-07-28 18:15:38 +0000 |
| commit | 91f064f3e1f3f40f07e666a3587ab49abafda4d7 (patch) | |
| tree | eec34e8fc00178e72ee01a8e9208ebed77e832bd | |
| parent | fa35c0bf27d1fbcfe7c6980362f6746818135264 (diff) | |
| download | external_llvm-91f064f3e1f3f40f07e666a3587ab49abafda4d7.zip external_llvm-91f064f3e1f3f40f07e666a3587ab49abafda4d7.tar.gz external_llvm-91f064f3e1f3f40f07e666a3587ab49abafda4d7.tar.bz2 | |
Add workaround for <rdar://problem/7098328>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77340 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 3 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-lsr3.ll | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 2affa63..6930402 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -714,8 +714,9 @@ defm t2LSR : T2I_sh_ir<"lsr", BinOpFrag<(srl node:$LHS, node:$RHS)>>; defm t2ASR : T2I_sh_ir<"asr", BinOpFrag<(sra node:$LHS, node:$RHS)>>; defm t2ROR : T2I_sh_ir<"ror", BinOpFrag<(rotr node:$LHS, node:$RHS)>>; +// FIXME should be "rrx $dst,$src" once <rdar://problem/7098328> is fixed def t2MOVrx : T2sI<(outs GPR:$dst), (ins GPR:$src), - "rrx", " $dst, $src", + "mov", ".w $dst, $src, rrx", [(set GPR:$dst, (ARMrrx GPR:$src))]>; let Defs = [CPSR] in { diff --git a/test/CodeGen/Thumb2/thumb2-lsr3.ll b/test/CodeGen/Thumb2/thumb2-lsr3.ll index 9bc4b5b..a3f7a1a 100644 --- a/test/CodeGen/Thumb2/thumb2-lsr3.ll +++ b/test/CodeGen/Thumb2/thumb2-lsr3.ll @@ -2,7 +2,7 @@ define i1 @test1(i64 %poscnt, i32 %work) { entry: -; CHECK: rrx r0, r0 +; CHECK: mov.w r0, r0, rrx ; CHECK: lsrs.w r1, r1, #1 %0 = lshr i64 %poscnt, 1 %1 = icmp eq i64 %0, 0 @@ -11,7 +11,7 @@ entry: define i1 @test2(i64 %poscnt, i32 %work) { entry: -; CHECK: rrx r0, r0 +; CHECK: mov.w r0, r0, rrx ; CHECK: asrs.w r1, r1, #1 %0 = ashr i64 %poscnt, 1 %1 = icmp eq i64 %0, 0 |