diff options
| author | Chris Lattner <sabre@nondot.org> | 2002-11-21 18:54:29 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2002-11-21 18:54:29 +0000 |
| commit | 92845e37f54674b1d1ff0ba671411c434a5dc511 (patch) | |
| tree | 6d2a06fe012d2b5b44e494282b7d0ce339c6c5fb | |
| parent | 457adb55f9d28353a8042c4253f79d897d85d764 (diff) | |
| download | external_llvm-92845e37f54674b1d1ff0ba671411c434a5dc511.zip external_llvm-92845e37f54674b1d1ff0ba671411c434a5dc511.tar.gz external_llvm-92845e37f54674b1d1ff0ba671411c434a5dc511.tar.bz2 | |
Remove implicit information from instruction selector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4811 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/InstSelectSimple.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/X86/X86ISelSimple.cpp | 8 |
2 files changed, 4 insertions, 12 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 7f163b8..978bbc7 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -398,12 +398,10 @@ void ISel::visitMul(BinaryOperator &I) { visitInstruction(I); static const unsigned Regs[] ={ X86::AL , X86::AX , X86::EAX }; - static const unsigned Clobbers[] ={ X86::AH , X86::DX , X86::EDX }; static const unsigned MulOpcode[]={ X86::MULrr8, X86::MULrr16, X86::MULrr32 }; static const unsigned MovOpcode[]={ X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 }; unsigned Reg = Regs[Class]; - unsigned Clobber = Clobbers[Class]; unsigned Op0Reg = getReg(I.getOperand(0)); unsigned Op1Reg = getReg(I.getOperand(1)); @@ -411,8 +409,7 @@ void ISel::visitMul(BinaryOperator &I) { BuildMI(BB, MovOpcode[Class], 1, Reg).addReg(Op0Reg); // Emit the appropriate multiply instruction... - BuildMI(BB, MulOpcode[Class], 3) - .addReg(Reg, UseAndDef).addReg(Op1Reg).addClobber(Clobber); + BuildMI(BB, MulOpcode[Class], 1).addReg(Op1Reg); // Put the result into the destination register... BuildMI(BB, MovOpcode[Class], 1, getReg(I)).addReg(Reg); @@ -458,8 +455,7 @@ void ISel::visitDivRem(BinaryOperator &I) { } // Emit the appropriate divide or remainder instruction... - BuildMI(BB, DivOpcode[isSigned][Class], 2) - .addReg(Reg, UseAndDef).addReg(ExtReg, UseAndDef).addReg(Op1Reg); + BuildMI(BB, DivOpcode[isSigned][Class], 1).addReg(Op1Reg); // Figure out which register we want to pick the result out of... unsigned DestReg = (I.getOpcode() == Instruction::Div) ? Reg : ExtReg; diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index 7f163b8..978bbc7 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -398,12 +398,10 @@ void ISel::visitMul(BinaryOperator &I) { visitInstruction(I); static const unsigned Regs[] ={ X86::AL , X86::AX , X86::EAX }; - static const unsigned Clobbers[] ={ X86::AH , X86::DX , X86::EDX }; static const unsigned MulOpcode[]={ X86::MULrr8, X86::MULrr16, X86::MULrr32 }; static const unsigned MovOpcode[]={ X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 }; unsigned Reg = Regs[Class]; - unsigned Clobber = Clobbers[Class]; unsigned Op0Reg = getReg(I.getOperand(0)); unsigned Op1Reg = getReg(I.getOperand(1)); @@ -411,8 +409,7 @@ void ISel::visitMul(BinaryOperator &I) { BuildMI(BB, MovOpcode[Class], 1, Reg).addReg(Op0Reg); // Emit the appropriate multiply instruction... - BuildMI(BB, MulOpcode[Class], 3) - .addReg(Reg, UseAndDef).addReg(Op1Reg).addClobber(Clobber); + BuildMI(BB, MulOpcode[Class], 1).addReg(Op1Reg); // Put the result into the destination register... BuildMI(BB, MovOpcode[Class], 1, getReg(I)).addReg(Reg); @@ -458,8 +455,7 @@ void ISel::visitDivRem(BinaryOperator &I) { } // Emit the appropriate divide or remainder instruction... - BuildMI(BB, DivOpcode[isSigned][Class], 2) - .addReg(Reg, UseAndDef).addReg(ExtReg, UseAndDef).addReg(Op1Reg); + BuildMI(BB, DivOpcode[isSigned][Class], 1).addReg(Op1Reg); // Figure out which register we want to pick the result out of... unsigned DestReg = (I.getOpcode() == Instruction::Div) ? Reg : ExtReg; |