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author | Evan Cheng <evan.cheng@apple.com> | 2008-06-16 21:16:24 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-06-16 21:16:24 +0000 |
commit | 944e4412e3f49337db2b730a92b72516c040edb4 (patch) | |
tree | 8829ab696dc190c50ead00ce54d82f5d0e369b06 | |
parent | c9684fa5b9d7f7a42943586d48c6ae3d9b7045a7 (diff) | |
download | external_llvm-944e4412e3f49337db2b730a92b72516c040edb4.zip external_llvm-944e4412e3f49337db2b730a92b72516c040edb4.tar.gz external_llvm-944e4412e3f49337db2b730a92b72516c040edb4.tar.bz2 |
Horizontal-add instructions are not commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52363 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/IntrinsicsX86.td | 19 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 8 |
2 files changed, 15 insertions, 12 deletions
diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index dbb8496..35c5011 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -553,24 +553,24 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_ssse3_phadd_w : GCCBuiltin<"__builtin_ia32_phaddw">, Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, - llvm_v4i16_ty], [IntrNoMem, Commutative]>; + llvm_v4i16_ty], [IntrNoMem]>; def int_x86_ssse3_phadd_w_128 : GCCBuiltin<"__builtin_ia32_phaddw128">, Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, - llvm_v8i16_ty], [IntrNoMem, Commutative]>; + llvm_v8i16_ty], [IntrNoMem]>; def int_x86_ssse3_phadd_d : GCCBuiltin<"__builtin_ia32_phaddd">, Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty, - llvm_v2i32_ty], [IntrNoMem, Commutative]>; + llvm_v2i32_ty], [IntrNoMem]>; def int_x86_ssse3_phadd_d_128 : GCCBuiltin<"__builtin_ia32_phaddd128">, Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, - llvm_v4i32_ty], [IntrNoMem, Commutative]>; + llvm_v4i32_ty], [IntrNoMem]>; def int_x86_ssse3_phadd_sw : GCCBuiltin<"__builtin_ia32_phaddsw">, Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, - llvm_v4i16_ty], [IntrNoMem, Commutative]>; + llvm_v4i16_ty], [IntrNoMem]>; def int_x86_ssse3_phadd_sw_128 : GCCBuiltin<"__builtin_ia32_phaddsw128">, Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, - llvm_v4i32_ty], [IntrNoMem, Commutative]>; + llvm_v4i32_ty], [IntrNoMem]>; def int_x86_ssse3_phsub_w : GCCBuiltin<"__builtin_ia32_phsubw">, Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, @@ -595,11 +595,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_ssse3_pmadd_ub_sw : GCCBuiltin<"__builtin_ia32_pmaddubsw">, Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, - llvm_v4i16_ty], [IntrNoMem, Commutative]>; + llvm_v4i16_ty], [IntrNoMem]>; def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">, Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, - llvm_v8i16_ty], [IntrNoMem, Commutative]>; + llvm_v8i16_ty], [IntrNoMem]>; +} +// Packed multiply high with round and scale +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_ssse3_pmul_hr_sw : GCCBuiltin<"__builtin_ia32_pmulhrsw">, Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty, llvm_v4i16_ty], [IntrNoMem, Commutative]>; diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 53a7dd0..74fcb5c 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -2745,13 +2745,13 @@ let Constraints = "$src1 = $dst" in { defm PHADDW : SS3I_binop_rm_int_16<0x01, "phaddw", int_x86_ssse3_phadd_w, - int_x86_ssse3_phadd_w_128, 1>; + int_x86_ssse3_phadd_w_128>; defm PHADDD : SS3I_binop_rm_int_32<0x02, "phaddd", int_x86_ssse3_phadd_d, - int_x86_ssse3_phadd_d_128, 1>; + int_x86_ssse3_phadd_d_128>; defm PHADDSW : SS3I_binop_rm_int_16<0x03, "phaddsw", int_x86_ssse3_phadd_sw, - int_x86_ssse3_phadd_sw_128, 1>; + int_x86_ssse3_phadd_sw_128>; defm PHSUBW : SS3I_binop_rm_int_16<0x05, "phsubw", int_x86_ssse3_phsub_w, int_x86_ssse3_phsub_w_128>; @@ -2763,7 +2763,7 @@ defm PHSUBSW : SS3I_binop_rm_int_16<0x07, "phsubsw", int_x86_ssse3_phsub_sw_128>; defm PMADDUBSW : SS3I_binop_rm_int_8 <0x04, "pmaddubsw", int_x86_ssse3_pmadd_ub_sw, - int_x86_ssse3_pmadd_ub_sw_128, 1>; + int_x86_ssse3_pmadd_ub_sw_128>; defm PMULHRSW : SS3I_binop_rm_int_16<0x0B, "pmulhrsw", int_x86_ssse3_pmul_hr_sw, int_x86_ssse3_pmul_hr_sw_128, 1>; |