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authorMisha Brukman <brukman+llvm@gmail.com>2002-12-13 11:33:22 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2002-12-13 11:33:22 +0000
commit972b03fa53ef2053172415f2d05cfc444c492e55 (patch)
tree57c57d5fd56796f846ff538b8faea53263990728
parent7d25589ee19747720a6cdb045ae442332f90bbcf (diff)
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This should be more correct: invalidates physical registers that are used in
an instruction to avoid using them to allocate to other virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5013 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/RegAllocSimple.cpp45
1 files changed, 41 insertions, 4 deletions
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index 609eabf..3a58b5a 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -79,6 +79,36 @@ namespace {
RegClassIdx.clear();
}
+ /// Invalidates any references, real or implicit, to physical registers
+ ///
+ void invalidatePhysRegs(const MachineInstr *MI) {
+ unsigned Opcode = MI->getOpcode();
+ const MachineInstrInfo &MII = TM.getInstrInfo();
+ const MachineInstrDescriptor &Desc = MII.get(Opcode);
+ const unsigned *regs = Desc.ImplicitUses;
+ while (*regs)
+ RegsUsed[*regs++] = 1;
+
+ regs = Desc.ImplicitDefs;
+ while (*regs)
+ RegsUsed[*regs++] = 1;
+
+
+ /*
+ for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
+ const MachineOperand &op = MI->getOperand(i);
+ if (op.isMachineRegister())
+ RegsUsed[op.getAllocatedRegNum()] = 1;
+ }
+
+ for (int i = MI->getNumImplicitRefs() - 1; i >= 0; --i) {
+ const MachineOperand &op = MI->getImplicitOp(i);
+ if (op.isMachineRegister())
+ RegsUsed[op.getAllocatedRegNum()] = 1;
+ }
+ */
+ }
+
void cleanupAfterFunction() {
RegMap.clear();
SSA2PhysRegMap.clear();
@@ -222,6 +252,12 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
// get rid of the phi
MBB->erase(MBB->begin());
+ // a preliminary pass that will invalidate any registers that
+ // are used by the instruction (including implicit uses)
+ invalidatePhysRegs(MI);
+
+ DEBUG(std::cerr << "num invalid regs: " << RegsUsed.size() << "\n");
+
DEBUG(std::cerr << "num ops: " << MI->getNumOperands() << "\n");
MachineOperand &targetReg = MI->getOperand(0);
@@ -285,13 +321,13 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
saveVirtRegToStack(opBlock, opI, virtualReg, opPhysReg);
}
}
+
+ // make regs available to other instructions
+ clearAllRegs();
}
// really delete the instruction
delete MI;
-
- // make regs available to other instructions
- clearAllRegs();
}
//loop over each basic block
@@ -299,8 +335,9 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
{
MachineInstr *MI = *I;
- // FIXME: add a preliminary pass that will invalidate any registers that
+ // a preliminary pass that will invalidate any registers that
// are used by the instruction (including implicit uses)
+ invalidatePhysRegs(MI);
// Loop over uses, move from memory into registers
for (int i = MI->getNumOperands() - 1; i >= 0; --i) {