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| author | Bill Wendling <isanbard@gmail.com> | 2010-11-29 22:37:46 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-11-29 22:37:46 +0000 |
| commit | 9b0e92ca5b65eb20ee51e67fedeac8288a1eccde (patch) | |
| tree | 5ebf4110a85b3a11520958841d00b721664b3d35 | |
| parent | 5ca66696e734f963b613de51e3df3684395daf1c (diff) | |
| download | external_llvm-9b0e92ca5b65eb20ee51e67fedeac8288a1eccde.zip external_llvm-9b0e92ca5b65eb20ee51e67fedeac8288a1eccde.tar.gz external_llvm-9b0e92ca5b65eb20ee51e67fedeac8288a1eccde.tar.bz2 | |
Thumb encodings for conditional moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120334 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 5ac8b98..5dae5bd 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -1210,12 +1210,24 @@ let usesCustomInserter = 1 in // Expanded after instruction selection. let neverHasSideEffects = 1 in { def tMOVCCr : T1pIt<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs), IIC_iCMOVr, "mov", "\t$dst, $rhs", []>, - T1Special<{1,0,?,?}>; + T1Special<{1,0,?,?}> { + bits<4> rhs; + bits<4> dst; + let Inst{7} = dst{3}; + let Inst{6-3} = rhs; + let Inst{2-0} = dst{2-0}; +} let isMoveImm = 1 in def tMOVCCi : T1pIt<(outs tGPR:$dst), (ins tGPR:$lhs, i32imm:$rhs), IIC_iCMOVi, "mov", "\t$dst, $rhs", []>, - T1General<{1,0,0,?,?}>; + T1General<{1,0,0,?,?}> { + bits<8> rhs; + bits<3> dst; + let Inst{10-8} = dst; + let Inst{7-0} = rhs; +} + } // neverHasSideEffects // tLEApcrel - Load a pc-relative address into a register without offending the |