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authorJohnny Chen <johnny.chen@apple.com>2011-03-29 19:49:38 +0000
committerJohnny Chen <johnny.chen@apple.com>2011-03-29 19:49:38 +0000
commit9eda569a74377bdcf8ce6073682fb9a4bd8a82ca (patch)
treed5daf4a9a90d6bcecce8993d19ef872a66f32884
parent4381dd1f21b90db256b42362f81ec96e045d46f6 (diff)
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A8.6.188 STC, STC2
The STC_OPTION and STC2_OPTION instructions should have their coprocessor option enclosed in {}. rdar://problem/9200661 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128478 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td6
-rw-r--r--test/MC/Disassembler/ARM/arm-tests.txt6
2 files changed, 9 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 2621b3e..c796003 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -3430,8 +3430,8 @@ multiclass LdStCop<bits<4> op31_28, bit load, string opc> {
}
def _OPTION : ACI<(outs),
- (ins nohash_imm:$cop, nohash_imm:$CRd, GPR:$base, i32imm:$option),
- opc, "\tp$cop, cr$CRd, [$base], $option"> {
+ (ins nohash_imm:$cop, nohash_imm:$CRd, GPR:$base, nohash_imm:$option),
+ opc, "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
let Inst{31-28} = op31_28;
let Inst{24} = 0; // P = 0
let Inst{23} = 1; // U = 1
@@ -3472,7 +3472,7 @@ multiclass LdStCop<bits<4> op31_28, bit load, string opc> {
def L_OPTION : ACI<(outs),
(ins nohash_imm:$cop, nohash_imm:$CRd, GPR:$base, nohash_imm:$option),
- !strconcat(opc, "l"), "\tp$cop, cr$CRd, [$base], $option"> {
+ !strconcat(opc, "l"), "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
let Inst{31-28} = op31_28;
let Inst{24} = 0; // P = 0
let Inst{23} = 1; // U = 1
diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
index 87b7e98..65d6206 100644
--- a/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -202,3 +202,9 @@
# CHECK: pli [r3, r1, lsl #2]
0x01 0xf1 0xd3 0xf6
+
+# CHECK: stc p2, cr4, [r9], {157}
+0x9d 0x42 0x89 0xec
+
+# CHECK: stc2 p2, cr4, [r9], {157}
+0x9d 0x42 0x89 0xfc