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author | Bill Wendling <isanbard@gmail.com> | 2008-05-12 20:54:26 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2008-05-12 20:54:26 +0000 |
commit | 9f8fea3531f8f8d04d1e183ff570be37d41d13f5 (patch) | |
tree | a073698eeb7c4d0ccb1adaa5aab19d48845843f4 | |
parent | c2616e43fd980505d3b29b92473d047f878f6708 (diff) | |
download | external_llvm-9f8fea3531f8f8d04d1e183ff570be37d41d13f5.zip external_llvm-9f8fea3531f8f8d04d1e183ff570be37d41d13f5.tar.gz external_llvm-9f8fea3531f8f8d04d1e183ff570be37d41d13f5.tar.bz2 |
Constify the machine instruction passed into the
"is{Trivially,Really}ReMaterializable" methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51001 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 3 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 2 |
3 files changed, 5 insertions, 4 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index ca35fa7..f9fd6ab 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -67,7 +67,7 @@ public: /// isTriviallyReMaterializable - Return true if the instruction is trivially /// rematerializable, meaning it has no side effects and requires no operands /// that aren't always available. - bool isTriviallyReMaterializable(MachineInstr *MI) const { + bool isTriviallyReMaterializable(const MachineInstr *MI) const { return MI->getDesc().isRematerializable() && isReallyTriviallyReMaterializable(MI); } @@ -81,7 +81,7 @@ protected: /// return false if the instruction has any side effects other than /// producing a value, or if it requres any address registers that are not /// always available. - virtual bool isReallyTriviallyReMaterializable(MachineInstr *MI) const { + virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const { return true; } diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 8b31f5d..d2c5abe 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -760,7 +760,8 @@ static inline bool isGVStub(GlobalValue *GV, X86TargetMachine &TM) { return TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false); } -bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const { +bool +X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI) const { switch (MI->getOpcode()) { default: break; case X86::MOV8rm: diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 5f09241..06080b7 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -260,7 +260,7 @@ public: unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; - bool isReallyTriviallyReMaterializable(MachineInstr *MI) const; + bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const; void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, const MachineInstr *Orig) const; |