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| author | Bob Wilson <bob.wilson@apple.com> | 2010-07-09 00:47:20 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-07-09 00:47:20 +0000 |
| commit | a0148c360e9bb4badabf1a2397cfd70907618f87 (patch) | |
| tree | ead800b5484043b9415654d6719a8dac5d06bd77 | |
| parent | bf87e2491789d6ff788629e22e93d0c1ca02ae85 (diff) | |
| download | external_llvm-a0148c360e9bb4badabf1a2397cfd70907618f87.zip external_llvm-a0148c360e9bb4badabf1a2397cfd70907618f87.tar.gz external_llvm-a0148c360e9bb4badabf1a2397cfd70907618f87.tar.bz2 | |
Print "dregpair" NEON operands with a space between them, for readability and
consistency with other instructions that have lists of register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107944 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/reg_sequence.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/machine-licm.ll | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index cd28dfa..e48bbe0 100644 --- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -307,7 +307,7 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, unsigned DRegLo = TM.getRegisterInfo()->getSubReg(Reg, ARM::dsub_0); unsigned DRegHi = TM.getRegisterInfo()->getSubReg(Reg, ARM::dsub_1); O << '{' - << getRegisterName(DRegLo) << ',' << getRegisterName(DRegHi) + << getRegisterName(DRegLo) << ", " << getRegisterName(DRegHi) << '}'; } else if (Modifier && strcmp(Modifier, "lane") == 0) { unsigned RegNum = ARMRegisterInfo::getRegisterNumbering(Reg); diff --git a/test/CodeGen/ARM/reg_sequence.ll b/test/CodeGen/ARM/reg_sequence.ll index 1c4552a..9e365c9 100644 --- a/test/CodeGen/ARM/reg_sequence.ll +++ b/test/CodeGen/ARM/reg_sequence.ll @@ -240,8 +240,8 @@ define arm_aapcs_vfpcc float @t9(%0* nocapture, %3* nocapture) nounwind { ; CHECK: vldr.64 ; CHECK-NOT: vmov d{{.*}}, d0 ; CHECK: vmov.i8 d1 -; CHECK-NEXT: vstmia r0, {d0,d1} -; CHECK-NEXT: vstmia r0, {d0,d1} +; CHECK-NEXT: vstmia r0, {d0, d1} +; CHECK-NEXT: vstmia r0, {d0, d1} %3 = bitcast double 0.000000e+00 to <2 x float> ; <<2 x float>> [#uses=2] %4 = shufflevector <2 x float> %3, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1] store <4 x float> %4, <4 x float>* undef, align 16 diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index 203565d..cdb3041 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -56,7 +56,7 @@ define void @t2(i8* %ptr1, i8* %ptr2) nounwind { entry: ; CHECK: t2: ; CHECK: adr r{{.}}, #LCPI1_0 -; CHECK: vldmia r3, {d0,d1} +; CHECK: vldmia r3, {d0, d1} br i1 undef, label %bb1, label %bb2 bb1: |