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| author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-10-05 02:29:47 +0000 |
|---|---|---|
| committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-10-05 02:29:47 +0000 |
| commit | a8147756d681f100e58e88aae842aebf4f51693d (patch) | |
| tree | 9a7c9c0c8bac4fcd34f2827a3512cec774c6526a | |
| parent | b64c573649d53bdd89699de9bc57ba48f9dd2f1b (diff) | |
| download | external_llvm-a8147756d681f100e58e88aae842aebf4f51693d.zip external_llvm-a8147756d681f100e58e88aae842aebf4f51693d.tar.gz external_llvm-a8147756d681f100e58e88aae842aebf4f51693d.tar.bz2 | |
[Sparc] Use correct alignment while loading/storing fp128 values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192023 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Sparc/SparcISelLowering.cpp | 17 | ||||
| -rw-r--r-- | test/CodeGen/SPARC/fp128.ll | 21 |
2 files changed, 34 insertions, 4 deletions
diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp index 32e0269..22662c0 100644 --- a/lib/Target/Sparc/SparcISelLowering.cpp +++ b/lib/Target/Sparc/SparcISelLowering.cpp @@ -2298,12 +2298,16 @@ static SDValue LowerF128Load(SDValue Op, SelectionDAG &DAG) assert(LdNode && LdNode->getOffset().getOpcode() == ISD::UNDEF && "Unexpected node type"); + unsigned alignment = LdNode->getAlignment(); + if (alignment > 8) + alignment = 8; + SDValue Hi64 = DAG.getLoad(MVT::f64, dl, LdNode->getChain(), LdNode->getBasePtr(), LdNode->getPointerInfo(), - false, false, false, 8); + false, false, false, alignment); EVT addrVT = LdNode->getBasePtr().getValueType(); SDValue LoPtr = DAG.getNode(ISD::ADD, dl, addrVT, LdNode->getBasePtr(), @@ -2313,7 +2317,7 @@ static SDValue LowerF128Load(SDValue Op, SelectionDAG &DAG) LdNode->getChain(), LoPtr, LdNode->getPointerInfo(), - false, false, false, 8); + false, false, false, alignment); SDValue SubRegEven = DAG.getTargetConstant(SP::sub_even64, MVT::i32); SDValue SubRegOdd = DAG.getTargetConstant(SP::sub_odd64, MVT::i32); @@ -2357,13 +2361,18 @@ static SDValue LowerF128Store(SDValue Op, SelectionDAG &DAG) { MVT::f64, StNode->getValue(), SubRegOdd); + + unsigned alignment = StNode->getAlignment(); + if (alignment > 8) + alignment = 8; + SDValue OutChains[2]; OutChains[0] = DAG.getStore(StNode->getChain(), dl, SDValue(Hi64, 0), StNode->getBasePtr(), MachinePointerInfo(), - false, false, 8); + false, false, alignment); EVT addrVT = StNode->getBasePtr().getValueType(); SDValue LoPtr = DAG.getNode(ISD::ADD, dl, addrVT, StNode->getBasePtr(), @@ -2373,7 +2382,7 @@ static SDValue LowerF128Store(SDValue Op, SelectionDAG &DAG) { SDValue(Lo64, 0), LoPtr, MachinePointerInfo(), - false, false, 8); + false, false, alignment); return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &OutChains[0], 2); } diff --git a/test/CodeGen/SPARC/fp128.ll b/test/CodeGen/SPARC/fp128.ll index 2406af7..789e074 100644 --- a/test/CodeGen/SPARC/fp128.ll +++ b/test/CodeGen/SPARC/fp128.ll @@ -126,3 +126,24 @@ entry: store fp128 %0, fp128* %scalar.result, align 8 ret void } + +; HARD-LABEL: fp128_unaligned +; HARD: ldub +; HARD: faddq +; HARD: stb +; HARD: jmp + +; SOFT-LABEL: fp128_unaligned +; SOFT: ldub +; SOFT: call _Q_add +; SOFT: stb +; SOFT: jmp + +define void @fp128_unaligned(fp128* %a, fp128* %b, fp128* %c) { +entry: + %0 = load fp128* %a, align 1 + %1 = load fp128* %b, align 1 + %2 = fadd fp128 %0, %1 + store fp128 %2, fp128* %c, align 1 + ret void +} |