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author | Evan Cheng <evan.cheng@apple.com> | 2010-05-10 19:03:57 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-05-10 19:03:57 +0000 |
commit | aad753bbbd98c952f7e65246af2faf5c7d5a850b (patch) | |
tree | 56b8ac3cef2c55af0b8ac483936ac15afd534b3a | |
parent | 1deea21e3512e8c41b5145711019048d39d1cb0b (diff) | |
download | external_llvm-aad753bbbd98c952f7e65246af2faf5c7d5a850b.zip external_llvm-aad753bbbd98c952f7e65246af2faf5c7d5a850b.tar.gz external_llvm-aad753bbbd98c952f7e65246af2faf5c7d5a850b.tar.bz2 |
Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103419 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 | ||||
-rw-r--r-- | test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll | 11 |
2 files changed, 21 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3639f80..c8d3e0d 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -760,12 +760,18 @@ SDValue DAGCombiner::PromoteIntBinOp(SDValue Op) { bool Replace1 = false; SDValue N1 = Op.getOperand(1); - SDValue NN1 = PromoteOperand(N1, PVT, Replace1); - if (NN1.getNode() == 0) - return SDValue(); + SDValue NN1; + if (N0 == N1) + NN1 = NN0; + else { + NN1 = PromoteOperand(N1, PVT, Replace1); + if (NN1.getNode() == 0) + return SDValue(); + } AddToWorkList(NN0.getNode()); - AddToWorkList(NN1.getNode()); + if (NN1.getNode()) + AddToWorkList(NN1.getNode()); if (Replace0) ReplaceLoadWithPromotedLoad(N0.getNode(), NN0.getNode()); diff --git a/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll b/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll new file mode 100644 index 0000000..e719da3 --- /dev/null +++ b/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10 +; PR7018 +; rdar://7939869 + +define i32 @CXB30130(i32 %num1, i16* nocapture %num2, float* nocapture %num3, double* nocapture %num4) nounwind ssp { +entry: + %0 = load i16* %num2, align 2 ; <i16> [#uses=2] + %1 = mul nsw i16 %0, %0 ; <i16> [#uses=1] + store i16 %1, i16* %num2, align 2 + ret i32 undef +} |