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| author | Preston Gurd <preston.gurd@intel.com> | 2012-05-02 22:02:02 +0000 |
|---|---|---|
| committer | Preston Gurd <preston.gurd@intel.com> | 2012-05-02 22:02:02 +0000 |
| commit | c0f0a93936a23a0935aa946a65095388b50c087f (patch) | |
| tree | 8c8c9d3784bf89e94daacfc72bfd8a2b559e761f | |
| parent | 79bbe855cd3443bc646b2aedb2973c9968ca3b7f (diff) | |
| download | external_llvm-c0f0a93936a23a0935aa946a65095388b50c087f.zip external_llvm-c0f0a93936a23a0935aa946a65095388b50c087f.tar.gz external_llvm-c0f0a93936a23a0935aa946a65095388b50c087f.tar.bz2 | |
For Intel Atom, use ILP scheduling always, instead of ILP for 64 bit
and Hybrid for 32 bit, since benchmarks show ILP scheduling is better
most of the time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156028 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index bbe2808..bdbdaf5 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -167,11 +167,11 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) // For 64-bit since we have so many registers use the ILP scheduler, for // 32-bit code use the register pressure specific scheduling. - // For 32 bit Atom, use Hybrid (register pressure + latency) scheduling. - if (Subtarget->is64Bit()) + // For Atom, always use ILP scheduling. + if (Subtarget->isAtom()) + setSchedulingPreference(Sched::ILP); + else if (Subtarget->is64Bit()) setSchedulingPreference(Sched::ILP); - else if (Subtarget->isAtom()) - setSchedulingPreference(Sched::Hybrid); else setSchedulingPreference(Sched::RegPressure); setStackPointerRegisterToSaveRestore(X86StackPtr); |