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author | Andrew Trick <atrick@apple.com> | 2012-01-17 06:54:59 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2012-01-17 06:54:59 +0000 |
commit | c1b1c7b205589c9a081e1cbd33fb56506fc287b3 (patch) | |
tree | c61481c57a7048303dbb3365d3208ce290020f2b | |
parent | 0f080913d1ff80bb61476724304359e14822b193 (diff) | |
download | external_llvm-c1b1c7b205589c9a081e1cbd33fb56506fc287b3.zip external_llvm-c1b1c7b205589c9a081e1cbd33fb56506fc287b3.tar.gz external_llvm-c1b1c7b205589c9a081e1cbd33fb56506fc287b3.tar.bz2 |
Moving options declarations around.
More short term hackery until we have a way to configure passes that work on LiveIntervals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148289 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetOptions.h | 4 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocBasic.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocGreedy.cpp | 7 | ||||
-rw-r--r-- | lib/Target/TargetMachine.cpp | 8 |
4 files changed, 7 insertions, 14 deletions
diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h index cb22b18..3f42bbe 100644 --- a/include/llvm/Target/TargetOptions.h +++ b/include/llvm/Target/TargetOptions.h @@ -34,10 +34,6 @@ namespace llvm { /// wth earlier copy coalescing. extern bool StrongPHIElim; - /// EnableMachineSched - temporary flag to enable the machine scheduling pass - /// until we complete the register allocation pass configuration cleanup. - extern bool EnableMachineSched; - class TargetOptions { public: TargetOptions() diff --git a/lib/CodeGen/RegAllocBasic.cpp b/lib/CodeGen/RegAllocBasic.cpp index cb92513..dbddf72 100644 --- a/lib/CodeGen/RegAllocBasic.cpp +++ b/lib/CodeGen/RegAllocBasic.cpp @@ -149,8 +149,6 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const { if (StrongPHIElim) AU.addRequiredID(StrongPHIEliminationID); AU.addRequiredTransitiveID(RegisterCoalescerPassID); - if (EnableMachineSched) - AU.addRequiredID(MachineSchedulerPassID); AU.addRequired<CalculateSpillWeights>(); AU.addRequired<LiveStacks>(); AU.addPreserved<LiveStacks>(); diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp index bced80c..16832ce 100644 --- a/lib/CodeGen/RegAllocGreedy.cpp +++ b/lib/CodeGen/RegAllocGreedy.cpp @@ -51,6 +51,13 @@ STATISTIC(NumGlobalSplits, "Number of split global live ranges"); STATISTIC(NumLocalSplits, "Number of split local live ranges"); STATISTIC(NumEvicted, "Number of interferences evicted"); +/// EnableMachineSched - temporary flag to enable the machine scheduling pass +/// until we complete the register allocation pass configuration cleanup. +static cl::opt<bool> +EnableMachineSched("enable-misched", + cl::desc("Enable the machine instruction scheduling pass."), + cl::init(false), cl::Hidden); + static cl::opt<SplitEditor::ComplementSpillMode> SplitSpillMode("split-spill-mode", cl::Hidden, cl::desc("Spill mode for splitting live ranges"), diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index 90042dc..19819b8 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -37,14 +37,6 @@ FunctionSections("ffunction-sections", cl::desc("Emit functions into separate sections"), cl::init(false)); -/// EnableMachineSched - temporary flag to enable the machine scheduling pass -/// until we complete the register allocation pass configuration cleanup. -static cl::opt<bool, true> -MachineSchedOpt("enable-misched", - cl::desc("Enable the machine instruction scheduling pass."), - cl::location(EnableMachineSched), - cl::init(false), cl::Hidden); - //--------------------------------------------------------------------------- // TargetMachine Class // |