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author | Brian Gaeke <gaeke@uiuc.edu> | 2004-12-10 08:39:29 +0000 |
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committer | Brian Gaeke <gaeke@uiuc.edu> | 2004-12-10 08:39:29 +0000 |
commit | c2e5f3635aa0cd9d10ca4315eec0ed7f161d55f5 (patch) | |
tree | 069a45bff2d0aea2f9adb7970b1a9b6745fcccec | |
parent | 1f42181f9917caeb5f441d66dbe7cf84aa94cd22 (diff) | |
download | external_llvm-c2e5f3635aa0cd9d10ca4315eec0ed7f161d55f5.zip external_llvm-c2e5f3635aa0cd9d10ca4315eec0ed7f161d55f5.tar.gz external_llvm-c2e5f3635aa0cd9d10ca4315eec0ed7f161d55f5.tar.bz2 |
Add the rest of the multiply instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18757 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 10 | ||||
-rw-r--r-- | lib/Target/SparcV8/SparcV8InstrInfo.td | 10 |
2 files changed, 16 insertions, 4 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index a798926..2bb5a5e 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -154,8 +154,14 @@ def SUBXCCrr: F3_1<2, 0b011100, "subxcc">; def SUBXCCri: F3_2<2, 0b011100, "subxcc">; // Section B.18 - Multiply Instructions, p. 113 -def UMULrr : F3_1<2, 0b001010, "umul">; -def SMULrr : F3_1<2, 0b001011, "smul">; +def UMULrr : F3_1<2, 0b001010, "umul">; +def UMULri : F3_2<2, 0b001010, "umul">; +def SMULrr : F3_1<2, 0b001011, "smul">; +def SMULri : F3_2<2, 0b001011, "smul">; +def UMULCCrr: F3_1<2, 0b011010, "umulcc">; +def UMULCCri: F3_2<2, 0b011010, "umulcc">; +def SMULCCrr: F3_1<2, 0b011011, "smulcc">; +def SMULCCri: F3_2<2, 0b011011, "smulcc">; // Section B.19 - Divide Instructions, p. 115 def UDIVrr : F3_1<2, 0b001110, "udiv">; diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td index a798926..2bb5a5e 100644 --- a/lib/Target/SparcV8/SparcV8InstrInfo.td +++ b/lib/Target/SparcV8/SparcV8InstrInfo.td @@ -154,8 +154,14 @@ def SUBXCCrr: F3_1<2, 0b011100, "subxcc">; def SUBXCCri: F3_2<2, 0b011100, "subxcc">; // Section B.18 - Multiply Instructions, p. 113 -def UMULrr : F3_1<2, 0b001010, "umul">; -def SMULrr : F3_1<2, 0b001011, "smul">; +def UMULrr : F3_1<2, 0b001010, "umul">; +def UMULri : F3_2<2, 0b001010, "umul">; +def SMULrr : F3_1<2, 0b001011, "smul">; +def SMULri : F3_2<2, 0b001011, "smul">; +def UMULCCrr: F3_1<2, 0b011010, "umulcc">; +def UMULCCri: F3_2<2, 0b011010, "umulcc">; +def SMULCCrr: F3_1<2, 0b011011, "smulcc">; +def SMULCCri: F3_2<2, 0b011011, "smulcc">; // Section B.19 - Divide Instructions, p. 115 def UDIVrr : F3_1<2, 0b001110, "udiv">; |