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| author | Jim Grosbach <grosbach@apple.com> | 2009-12-15 00:12:35 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-12-15 00:12:35 +0000 |
| commit | c67b556b5b9c45f393e62fa7ffd4c70b932af2be (patch) | |
| tree | c608fae4230febd70b74386f5dc888b8fccd4553 | |
| parent | 2e141d744ee1354f49a99d9da49dbd9570e4269d (diff) | |
| download | external_llvm-c67b556b5b9c45f393e62fa7ffd4c70b932af2be.zip external_llvm-c67b556b5b9c45f393e62fa7ffd4c70b932af2be.tar.gz external_llvm-c67b556b5b9c45f393e62fa7ffd4c70b932af2be.tar.bz2 | |
nand atomic requires opposite operand ordering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91371 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 7950ee0..655c762 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -3190,9 +3190,15 @@ ARMTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB, // fallthrough --> exitMBB BB = loopMBB; AddDefaultPred(BuildMI(BB, dl, TII->get(ldrOpc), dest).addReg(ptr)); - if (BinOpcode) - AddDefaultPred(BuildMI(BB, dl, TII->get(BinOpcode), scratch2). - addReg(dest).addReg(incr)).addReg(0); + if (BinOpcode) { + // operand order needs to go the other way for NAND + if (BinOpcode == ARM::BICrr || BinOpcode == ARM::t2BICrr) + AddDefaultPred(BuildMI(BB, dl, TII->get(BinOpcode), scratch2). + addReg(incr).addReg(dest)).addReg(0); + else + AddDefaultPred(BuildMI(BB, dl, TII->get(BinOpcode), scratch2). + addReg(dest).addReg(incr)).addReg(0); + } AddDefaultPred(BuildMI(BB, dl, TII->get(strOpc), scratch).addReg(scratch2) .addReg(ptr)); |