diff options
author | Lang Hames <lhames@gmail.com> | 2009-10-03 04:21:37 +0000 |
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committer | Lang Hames <lhames@gmail.com> | 2009-10-03 04:21:37 +0000 |
commit | cc3b0650f1feec45d1a2890b20c05c4b325f1788 (patch) | |
tree | 0fd5a51ecec517e516bf433fa114d4d19f3bd6e6 | |
parent | e2b208a5e1dfece2462f595dec2d8f8ff3c1b98f (diff) | |
download | external_llvm-cc3b0650f1feec45d1a2890b20c05c4b325f1788.zip external_llvm-cc3b0650f1feec45d1a2890b20c05c4b325f1788.tar.gz external_llvm-cc3b0650f1feec45d1a2890b20c05c4b325f1788.tar.bz2 |
Renamed MachineInstrIndex to LiveIndex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83254 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/CodeGen/LiveInterval.h | 174 | ||||
-rw-r--r-- | include/llvm/CodeGen/LiveIntervalAnalysis.h | 102 | ||||
-rw-r--r-- | lib/CodeGen/LiveInterval.cpp | 46 | ||||
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 184 | ||||
-rw-r--r-- | lib/CodeGen/PreAllocSplitting.cpp | 102 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 24 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocPBQP.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 90 | ||||
-rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.h | 8 | ||||
-rw-r--r-- | lib/CodeGen/Spiller.cpp | 44 | ||||
-rw-r--r-- | lib/CodeGen/StrongPHIElimination.cpp | 18 | ||||
-rw-r--r-- | lib/CodeGen/VirtRegMap.h | 10 |
12 files changed, 402 insertions, 402 deletions
diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h index 1878b2e..05bd173 100644 --- a/include/llvm/CodeGen/LiveInterval.h +++ b/include/llvm/CodeGen/LiveInterval.h @@ -34,12 +34,12 @@ namespace llvm { class TargetRegisterInfo; class raw_ostream; - /// MachineInstrIndex - An opaque wrapper around machine indexes. - class MachineInstrIndex { + /// LiveIndex - An opaque wrapper around machine indexes. + class LiveIndex { friend class VNInfo; friend class LiveInterval; friend class LiveIntervals; - friend struct DenseMapInfo<MachineInstrIndex>; + friend struct DenseMapInfo<LiveIndex>; public: @@ -53,45 +53,45 @@ namespace llvm { public: - /// Construct a default MachineInstrIndex pointing to a reserved index. - MachineInstrIndex() : index(0) {} + /// Construct a default LiveIndex pointing to a reserved index. + LiveIndex() : index(0) {} /// Construct an index from the given index, pointing to the given slot. - MachineInstrIndex(MachineInstrIndex m, Slot s) + LiveIndex(LiveIndex m, Slot s) : index((m.index / NUM) * NUM + s) {} /// Print this index to the given raw_ostream. void print(raw_ostream &os) const; - /// Compare two MachineInstrIndex objects for equality. - bool operator==(MachineInstrIndex other) const { + /// Compare two LiveIndex objects for equality. + bool operator==(LiveIndex other) const { return ((index & ~PHI_BIT) == (other.index & ~PHI_BIT)); } - /// Compare two MachineInstrIndex objects for inequality. - bool operator!=(MachineInstrIndex other) const { + /// Compare two LiveIndex objects for inequality. + bool operator!=(LiveIndex other) const { return ((index & ~PHI_BIT) != (other.index & ~PHI_BIT)); } - /// Compare two MachineInstrIndex objects. Return true if the first index + /// Compare two LiveIndex objects. Return true if the first index /// is strictly lower than the second. - bool operator<(MachineInstrIndex other) const { + bool operator<(LiveIndex other) const { return ((index & ~PHI_BIT) < (other.index & ~PHI_BIT)); } - /// Compare two MachineInstrIndex objects. Return true if the first index + /// Compare two LiveIndex objects. Return true if the first index /// is lower than, or equal to, the second. - bool operator<=(MachineInstrIndex other) const { + bool operator<=(LiveIndex other) const { return ((index & ~PHI_BIT) <= (other.index & ~PHI_BIT)); } - /// Compare two MachineInstrIndex objects. Return true if the first index + /// Compare two LiveIndex objects. Return true if the first index /// is greater than the second. - bool operator>(MachineInstrIndex other) const { + bool operator>(LiveIndex other) const { return ((index & ~PHI_BIT) > (other.index & ~PHI_BIT)); } - /// Compare two MachineInstrIndex objects. Return true if the first index + /// Compare two LiveIndex objects. Return true if the first index /// is greater than, or equal to, the second. - bool operator>=(MachineInstrIndex other) const { + bool operator>=(LiveIndex other) const { return ((index & ~PHI_BIT) >= (other.index & ~PHI_BIT)); } @@ -115,7 +115,7 @@ namespace llvm { return ((index % NUM) == STORE); } - /// Returns the slot for this MachineInstrIndex. + /// Returns the slot for this LiveIndex. Slot getSlot() const { return static_cast<Slot>(index % NUM); } @@ -133,53 +133,53 @@ namespace llvm { private: /// Construct an index from the given index, with its PHI kill marker set. - MachineInstrIndex(bool phi, MachineInstrIndex o) : index(o.index) { + LiveIndex(bool phi, LiveIndex o) : index(o.index) { if (phi) index |= PHI_BIT; else index &= ~PHI_BIT; } - explicit MachineInstrIndex(unsigned idx) + explicit LiveIndex(unsigned idx) : index(idx & ~PHI_BIT) {} - MachineInstrIndex(bool phi, unsigned idx) + LiveIndex(bool phi, unsigned idx) : index(idx & ~PHI_BIT) { if (phi) index |= PHI_BIT; } - MachineInstrIndex(bool phi, unsigned idx, Slot slot) + LiveIndex(bool phi, unsigned idx, Slot slot) : index(((idx / NUM) * NUM + slot) & ~PHI_BIT) { if (phi) index |= PHI_BIT; } - MachineInstrIndex nextSlot_() const { + LiveIndex nextSlot_() const { assert((index & PHI_BIT) == ((index + 1) & PHI_BIT) && "Index out of bounds."); - return MachineInstrIndex(index + 1); + return LiveIndex(index + 1); } - MachineInstrIndex nextIndex_() const { + LiveIndex nextIndex_() const { assert((index & PHI_BIT) == ((index + NUM) & PHI_BIT) && "Index out of bounds."); - return MachineInstrIndex(index + NUM); + return LiveIndex(index + NUM); } - MachineInstrIndex prevSlot_() const { + LiveIndex prevSlot_() const { assert((index & PHI_BIT) == ((index - 1) & PHI_BIT) && "Index out of bounds."); - return MachineInstrIndex(index - 1); + return LiveIndex(index - 1); } - MachineInstrIndex prevIndex_() const { + LiveIndex prevIndex_() const { assert((index & PHI_BIT) == ((index - NUM) & PHI_BIT) && "Index out of bounds."); - return MachineInstrIndex(index - NUM); + return LiveIndex(index - NUM); } - int distance(MachineInstrIndex other) const { + int distance(LiveIndex other) const { return (other.index & ~PHI_BIT) - (index & ~PHI_BIT); } @@ -190,47 +190,47 @@ namespace llvm { } /// Scale this index by the given factor. - MachineInstrIndex scale(unsigned factor) const { + LiveIndex scale(unsigned factor) const { unsigned i = (index & ~PHI_BIT) / NUM, o = (index % ~PHI_BIT) % NUM; assert(index <= (~0U & ~PHI_BIT) / (factor * NUM) && "Rescaled interval would overflow"); - return MachineInstrIndex(i * NUM * factor, o); + return LiveIndex(i * NUM * factor, o); } - static MachineInstrIndex emptyKey() { - return MachineInstrIndex(true, 0x7fffffff); + static LiveIndex emptyKey() { + return LiveIndex(true, 0x7fffffff); } - static MachineInstrIndex tombstoneKey() { - return MachineInstrIndex(true, 0x7ffffffe); + static LiveIndex tombstoneKey() { + return LiveIndex(true, 0x7ffffffe); } - static unsigned getHashValue(const MachineInstrIndex &v) { + static unsigned getHashValue(const LiveIndex &v) { return v.index * 37; } }; - inline raw_ostream& operator<<(raw_ostream &os, MachineInstrIndex mi) { + inline raw_ostream& operator<<(raw_ostream &os, LiveIndex mi) { mi.print(os); return os; } - /// Densemap specialization for MachineInstrIndex. + /// Densemap specialization for LiveIndex. template <> - struct DenseMapInfo<MachineInstrIndex> { - static inline MachineInstrIndex getEmptyKey() { - return MachineInstrIndex::emptyKey(); + struct DenseMapInfo<LiveIndex> { + static inline LiveIndex getEmptyKey() { + return LiveIndex::emptyKey(); } - static inline MachineInstrIndex getTombstoneKey() { - return MachineInstrIndex::tombstoneKey(); + static inline LiveIndex getTombstoneKey() { + return LiveIndex::tombstoneKey(); } - static inline unsigned getHashValue(const MachineInstrIndex &v) { - return MachineInstrIndex::getHashValue(v); + static inline unsigned getHashValue(const LiveIndex &v) { + return LiveIndex::getHashValue(v); } - static inline bool isEqual(const MachineInstrIndex &LHS, - const MachineInstrIndex &RHS) { + static inline bool isEqual(const LiveIndex &LHS, + const LiveIndex &RHS) { return (LHS == RHS); } static inline bool isPod() { return true; } @@ -270,13 +270,13 @@ namespace llvm { public: - typedef SmallVector<MachineInstrIndex, 4> KillSet; + typedef SmallVector<LiveIndex, 4> KillSet; /// The ID number of this value. unsigned id; /// The index of the defining instruction (if isDefAccurate() returns true). - MachineInstrIndex def; + LiveIndex def; KillSet kills; @@ -286,7 +286,7 @@ namespace llvm { /// VNInfo constructor. /// d is presumed to point to the actual defining instr. If it doesn't /// setIsDefAccurate(false) should be called after construction. - VNInfo(unsigned i, MachineInstrIndex d, MachineInstr *c) + VNInfo(unsigned i, LiveIndex d, MachineInstr *c) : flags(IS_DEF_ACCURATE), id(i), def(d) { cr.copy = c; } /// VNInfo construtor, copies values from orig, except for the value number. @@ -377,7 +377,7 @@ namespace llvm { } /// Returns true if the given index is a kill of this value. - bool isKill(MachineInstrIndex k) const { + bool isKill(LiveIndex k) const { KillSet::const_iterator i = std::lower_bound(kills.begin(), kills.end(), k); return (i != kills.end() && *i == k); @@ -385,7 +385,7 @@ namespace llvm { /// addKill - Add a kill instruction index to the specified value /// number. - void addKill(MachineInstrIndex k) { + void addKill(LiveIndex k) { if (kills.empty()) { kills.push_back(k); } else { @@ -397,7 +397,7 @@ namespace llvm { /// Remove the specified kill index from this value's kills list. /// Returns true if the value was present, otherwise returns false. - bool removeKill(MachineInstrIndex k) { + bool removeKill(LiveIndex k) { KillSet::iterator i = std::lower_bound(kills.begin(), kills.end(), k); if (i != kills.end() && *i == k) { kills.erase(i); @@ -407,7 +407,7 @@ namespace llvm { } /// Remove all kills in the range [s, e). - void removeKills(MachineInstrIndex s, MachineInstrIndex e) { + void removeKills(LiveIndex s, LiveIndex e) { KillSet::iterator si = std::lower_bound(kills.begin(), kills.end(), s), se = std::upper_bound(kills.begin(), kills.end(), e); @@ -421,11 +421,11 @@ namespace llvm { /// program, with an inclusive start point and an exclusive end point. /// These ranges are rendered as [start,end). struct LiveRange { - MachineInstrIndex start; // Start point of the interval (inclusive) - MachineInstrIndex end; // End point of the interval (exclusive) + LiveIndex start; // Start point of the interval (inclusive) + LiveIndex end; // End point of the interval (exclusive) VNInfo *valno; // identifier for the value contained in this interval. - LiveRange(MachineInstrIndex S, MachineInstrIndex E, VNInfo *V) + LiveRange(LiveIndex S, LiveIndex E, VNInfo *V) : start(S), end(E), valno(V) { assert(S < E && "Cannot create empty or backwards range"); @@ -433,13 +433,13 @@ namespace llvm { /// contains - Return true if the index is covered by this range. /// - bool contains(MachineInstrIndex I) const { + bool contains(LiveIndex I) const { return start <= I && I < end; } /// containsRange - Return true if the given range, [S, E), is covered by /// this range. - bool containsRange(MachineInstrIndex S, MachineInstrIndex E) const { + bool containsRange(LiveIndex S, LiveIndex E) const { assert((S < E) && "Backwards interval?"); return (start <= S && S < end) && (start < E && E <= end); } @@ -461,11 +461,11 @@ namespace llvm { raw_ostream& operator<<(raw_ostream& os, const LiveRange &LR); - inline bool operator<(MachineInstrIndex V, const LiveRange &LR) { + inline bool operator<(LiveIndex V, const LiveRange &LR) { return V < LR.start; } - inline bool operator<(const LiveRange &LR, MachineInstrIndex V) { + inline bool operator<(const LiveRange &LR, LiveIndex V) { return LR.start < V; } @@ -522,7 +522,7 @@ namespace llvm { /// end of the interval. If no LiveRange contains this position, but the /// position is in a hole, this method returns an iterator pointing the the /// LiveRange immediately after the hole. - iterator advanceTo(iterator I, MachineInstrIndex Pos) { + iterator advanceTo(iterator I, LiveIndex Pos) { if (Pos >= endIndex()) return end(); while (I->end <= Pos) ++I; @@ -569,7 +569,7 @@ namespace llvm { /// getNextValue - Create a new value number and return it. MIIdx specifies /// the instruction that defines the value number. - VNInfo *getNextValue(MachineInstrIndex def, MachineInstr *CopyMI, + VNInfo *getNextValue(LiveIndex def, MachineInstr *CopyMI, bool isDefAccurate, BumpPtrAllocator &VNInfoAllocator){ VNInfo *VNI = static_cast<VNInfo*>(VNInfoAllocator.Allocate((unsigned)sizeof(VNInfo), @@ -630,8 +630,8 @@ namespace llvm { /// MergeInClobberRange - Same as MergeInClobberRanges except it merge in a /// single LiveRange only. - void MergeInClobberRange(MachineInstrIndex Start, - MachineInstrIndex End, + void MergeInClobberRange(LiveIndex Start, + LiveIndex End, BumpPtrAllocator &VNInfoAllocator); /// MergeValueInAsValue - Merge all of the live ranges of a specific val# @@ -657,56 +657,56 @@ namespace llvm { bool empty() const { return ranges.empty(); } /// beginIndex - Return the lowest numbered slot covered by interval. - MachineInstrIndex beginIndex() const { + LiveIndex beginIndex() const { if (empty()) - return MachineInstrIndex(); + return LiveIndex(); return ranges.front().start; } /// endNumber - return the maximum point of the interval of the whole, /// exclusive. - MachineInstrIndex endIndex() const { + LiveIndex endIndex() const { if (empty()) - return MachineInstrIndex(); + return LiveIndex(); return ranges.back().end; } - bool expiredAt(MachineInstrIndex index) const { + bool expiredAt(LiveIndex index) const { return index >= endIndex(); } - bool liveAt(MachineInstrIndex index) const; + bool liveAt(LiveIndex index) const; // liveBeforeAndAt - Check if the interval is live at the index and the // index just before it. If index is liveAt, check if it starts a new live // range.If it does, then check if the previous live range ends at index-1. - bool liveBeforeAndAt(MachineInstrIndex index) const; + bool liveBeforeAndAt(LiveIndex index) const; /// getLiveRangeContaining - Return the live range that contains the /// specified index, or null if there is none. - const LiveRange *getLiveRangeContaining(MachineInstrIndex Idx) const { + const LiveRange *getLiveRangeContaining(LiveIndex Idx) const { const_iterator I = FindLiveRangeContaining(Idx); return I == end() ? 0 : &*I; } /// getLiveRangeContaining - Return the live range that contains the /// specified index, or null if there is none. - LiveRange *getLiveRangeContaining(MachineInstrIndex Idx) { + LiveRange *getLiveRangeContaining(LiveIndex Idx) { iterator I = FindLiveRangeContaining(Idx); return I == end() ? 0 : &*I; } /// FindLiveRangeContaining - Return an iterator to the live range that /// contains the specified index, or end() if there is none. - const_iterator FindLiveRangeContaining(MachineInstrIndex Idx) const; + const_iterator FindLiveRangeContaining(LiveIndex Idx) const; /// FindLiveRangeContaining - Return an iterator to the live range that /// contains the specified index, or end() if there is none. - iterator FindLiveRangeContaining(MachineInstrIndex Idx); + iterator FindLiveRangeContaining(LiveIndex Idx); /// findDefinedVNInfo - Find the by the specified /// index (register interval) or defined - VNInfo *findDefinedVNInfoForRegInt(MachineInstrIndex Idx) const; + VNInfo *findDefinedVNInfoForRegInt(LiveIndex Idx) const; /// findDefinedVNInfo - Find the VNInfo that's defined by the specified /// register (stack inteval only). @@ -721,7 +721,7 @@ namespace llvm { /// overlaps - Return true if the live interval overlaps a range specified /// by [Start, End). - bool overlaps(MachineInstrIndex Start, MachineInstrIndex End) const; + bool overlaps(LiveIndex Start, LiveIndex End) const; /// overlapsFrom - Return true if the intersection of the two live intervals /// is not empty. The specified iterator is a hint that we can begin @@ -745,11 +745,11 @@ namespace llvm { /// isInOneLiveRange - Return true if the range specified is entirely in the /// a single LiveRange of the live interval. - bool isInOneLiveRange(MachineInstrIndex Start, MachineInstrIndex End); + bool isInOneLiveRange(LiveIndex Start, LiveIndex End); /// removeRange - Remove the specified range from this interval. Note that /// the range must be a single LiveRange in its entirety. - void removeRange(MachineInstrIndex Start, MachineInstrIndex End, + void removeRange(LiveIndex Start, LiveIndex End, bool RemoveDeadValNo = false); void removeRange(LiveRange LR, bool RemoveDeadValNo = false) { @@ -773,8 +773,8 @@ namespace llvm { void ComputeJoinedWeight(const LiveInterval &Other); bool operator<(const LiveInterval& other) const { - const MachineInstrIndex &thisIndex = beginIndex(); - const MachineInstrIndex &otherIndex = other.beginIndex(); + const LiveIndex &thisIndex = beginIndex(); + const LiveIndex &otherIndex = other.beginIndex(); return (thisIndex < otherIndex || (thisIndex == otherIndex && reg < other.reg)); } @@ -785,8 +785,8 @@ namespace llvm { private: Ranges::iterator addRangeFrom(LiveRange LR, Ranges::iterator From); - void extendIntervalEndTo(Ranges::iterator I, MachineInstrIndex NewEnd); - Ranges::iterator extendIntervalStartTo(Ranges::iterator I, MachineInstrIndex NewStr); + void extendIntervalEndTo(Ranges::iterator I, LiveIndex NewEnd); + Ranges::iterator extendIntervalStartTo(Ranges::iterator I, LiveIndex NewStr); LiveInterval& operator=(const LiveInterval& rhs); // DO NOT IMPLEMENT }; diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h index 3311788..cf33d48 100644 --- a/include/llvm/CodeGen/LiveIntervalAnalysis.h +++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h @@ -40,13 +40,13 @@ namespace llvm { class TargetInstrInfo; class TargetRegisterClass; class VirtRegMap; - typedef std::pair<MachineInstrIndex, MachineBasicBlock*> IdxMBBPair; + typedef std::pair<LiveIndex, MachineBasicBlock*> IdxMBBPair; - inline bool operator<(MachineInstrIndex V, const IdxMBBPair &IM) { + inline bool operator<(LiveIndex V, const IdxMBBPair &IM) { return V < IM.first; } - inline bool operator<(const IdxMBBPair &IM, MachineInstrIndex V) { + inline bool operator<(const IdxMBBPair &IM, LiveIndex V) { return IM.first < V; } @@ -71,7 +71,7 @@ namespace llvm { /// MBB2IdxMap - The indexes of the first and last instructions in the /// specified basic block. - std::vector<std::pair<MachineInstrIndex, MachineInstrIndex> > MBB2IdxMap; + std::vector<std::pair<LiveIndex, LiveIndex> > MBB2IdxMap; /// Idx2MBBMap - Sorted list of pairs of index of first instruction /// and MBB id. @@ -80,7 +80,7 @@ namespace llvm { /// FunctionSize - The number of instructions present in the function uint64_t FunctionSize; - typedef DenseMap<const MachineInstr*, MachineInstrIndex> Mi2IndexMap; + typedef DenseMap<const MachineInstr*, LiveIndex> Mi2IndexMap; Mi2IndexMap mi2iMap_; typedef std::vector<MachineInstr*> Index2MiMap; @@ -89,7 +89,7 @@ namespace llvm { typedef DenseMap<unsigned, LiveInterval*> Reg2IntervalMap; Reg2IntervalMap r2iMap_; - DenseMap<MachineBasicBlock*, MachineInstrIndex> terminatorGaps; + DenseMap<MachineBasicBlock*, LiveIndex> terminatorGaps; /// phiJoinCopies - Copy instructions which are PHI joins. SmallVector<MachineInstr*, 16> phiJoinCopies; @@ -106,39 +106,39 @@ namespace llvm { static char ID; // Pass identification, replacement for typeid LiveIntervals() : MachineFunctionPass(&ID) {} - MachineInstrIndex getBaseIndex(MachineInstrIndex index) { - return MachineInstrIndex(index, MachineInstrIndex::LOAD); + LiveIndex getBaseIndex(LiveIndex index) { + return LiveIndex(index, LiveIndex::LOAD); } - MachineInstrIndex getBoundaryIndex(MachineInstrIndex index) { - return MachineInstrIndex(index, - (MachineInstrIndex::Slot)(MachineInstrIndex::NUM - 1)); + LiveIndex getBoundaryIndex(LiveIndex index) { + return LiveIndex(index, + (LiveIndex::Slot)(LiveIndex::NUM - 1)); } - MachineInstrIndex getLoadIndex(MachineInstrIndex index) { - return MachineInstrIndex(index, MachineInstrIndex::LOAD); + LiveIndex getLoadIndex(LiveIndex index) { + return LiveIndex(index, LiveIndex::LOAD); } - MachineInstrIndex getUseIndex(MachineInstrIndex index) { - return MachineInstrIndex(index, MachineInstrIndex::USE); + LiveIndex getUseIndex(LiveIndex index) { + return LiveIndex(index, LiveIndex::USE); } - MachineInstrIndex getDefIndex(MachineInstrIndex index) { - return MachineInstrIndex(index, MachineInstrIndex::DEF); + LiveIndex getDefIndex(LiveIndex index) { + return LiveIndex(index, LiveIndex::DEF); } - MachineInstrIndex getStoreIndex(MachineInstrIndex index) { - return MachineInstrIndex(index, MachineInstrIndex::STORE); + LiveIndex getStoreIndex(LiveIndex index) { + return LiveIndex(index, LiveIndex::STORE); } - MachineInstrIndex getNextSlot(MachineInstrIndex m) const { + LiveIndex getNextSlot(LiveIndex m) const { return m.nextSlot_(); } - MachineInstrIndex getNextIndex(MachineInstrIndex m) const { + LiveIndex getNextIndex(LiveIndex m) const { return m.nextIndex_(); } - MachineInstrIndex getPrevSlot(MachineInstrIndex m) const { + LiveIndex getPrevSlot(LiveIndex m) const { return m.prevSlot_(); } - MachineInstrIndex getPrevIndex(MachineInstrIndex m) const { + LiveIndex getPrevIndex(LiveIndex m) const { return m.prevIndex_(); } @@ -172,20 +172,20 @@ namespace llvm { /// getMBBStartIdx - Return the base index of the first instruction in the /// specified MachineBasicBlock. - MachineInstrIndex getMBBStartIdx(MachineBasicBlock *MBB) const { + LiveIndex getMBBStartIdx(MachineBasicBlock *MBB) const { return getMBBStartIdx(MBB->getNumber()); } - MachineInstrIndex getMBBStartIdx(unsigned MBBNo) const { + LiveIndex getMBBStartIdx(unsigned MBBNo) const { assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!"); return MBB2IdxMap[MBBNo].first; } /// getMBBEndIdx - Return the store index of the last instruction in the /// specified MachineBasicBlock. - MachineInstrIndex getMBBEndIdx(MachineBasicBlock *MBB) const { + LiveIndex getMBBEndIdx(MachineBasicBlock *MBB) const { return getMBBEndIdx(MBB->getNumber()); } - MachineInstrIndex getMBBEndIdx(unsigned MBBNo) const { + LiveIndex getMBBEndIdx(unsigned MBBNo) const { assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!"); return MBB2IdxMap[MBBNo].second; } @@ -206,7 +206,7 @@ namespace llvm { /// getMBBFromIndex - given an index in any instruction of an /// MBB return a pointer the MBB - MachineBasicBlock* getMBBFromIndex(MachineInstrIndex index) const { + MachineBasicBlock* getMBBFromIndex(LiveIndex index) const { std::vector<IdxMBBPair>::const_iterator I = std::lower_bound(Idx2MBBMap.begin(), Idx2MBBMap.end(), index); // Take the pair containing the index @@ -221,7 +221,7 @@ namespace llvm { } /// getInstructionIndex - returns the base index of instr - MachineInstrIndex getInstructionIndex(const MachineInstr* instr) const { + LiveIndex getInstructionIndex(const MachineInstr* instr) const { Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); assert(it != mi2iMap_.end() && "Invalid instruction!"); return it->second; @@ -229,7 +229,7 @@ namespace llvm { /// getInstructionFromIndex - given an index in any slot of an /// instruction return a pointer the instruction - MachineInstr* getInstructionFromIndex(MachineInstrIndex index) const { + MachineInstr* getInstructionFromIndex(LiveIndex index) const { // convert index to vector index unsigned i = index.getVecIndex(); assert(i < i2miMap_.size() && @@ -239,14 +239,14 @@ namespace llvm { /// hasGapBeforeInstr - Return true if the previous instruction slot, /// i.e. Index - InstrSlots::NUM, is not occupied. - bool hasGapBeforeInstr(MachineInstrIndex Index) { + bool hasGapBeforeInstr(LiveIndex Index) { Index = getBaseIndex(getPrevIndex(Index)); return getInstructionFromIndex(Index) == 0; } /// hasGapAfterInstr - Return true if the successive instruction slot, /// i.e. Index + InstrSlots::Num, is not occupied. - bool hasGapAfterInstr(MachineInstrIndex Index) { + bool hasGapAfterInstr(LiveIndex Index) { Index = getBaseIndex(getNextIndex(Index)); return getInstructionFromIndex(Index) == 0; } @@ -254,14 +254,14 @@ namespace llvm { /// findGapBeforeInstr - Find an empty instruction slot before the /// specified index. If "Furthest" is true, find one that's furthest /// away from the index (but before any index that's occupied). - MachineInstrIndex findGapBeforeInstr(MachineInstrIndex Index, + LiveIndex findGapBeforeInstr(LiveIndex Index, bool Furthest = false) { Index = getBaseIndex(getPrevIndex(Index)); if (getInstructionFromIndex(Index)) - return MachineInstrIndex(); // No gap! + return LiveIndex(); // No gap! if (!Furthest) return Index; - MachineInstrIndex PrevIndex = getBaseIndex(getPrevIndex(Index)); + LiveIndex PrevIndex = getBaseIndex(getPrevIndex(Index)); while (getInstructionFromIndex(Index)) { Index = PrevIndex; PrevIndex = getBaseIndex(getPrevIndex(Index)); @@ -271,7 +271,7 @@ namespace llvm { /// InsertMachineInstrInMaps - Insert the specified machine instruction /// into the instruction index map at the given index. - void InsertMachineInstrInMaps(MachineInstr *MI, MachineInstrIndex Index) { + void InsertMachineInstrInMaps(MachineInstr *MI, LiveIndex Index) { i2miMap_[Index.getVecIndex()] = MI; Mi2IndexMap::iterator it = mi2iMap_.find(MI); assert(it == mi2iMap_.end() && "Already in map!"); @@ -292,12 +292,12 @@ namespace llvm { /// findLiveInMBBs - Given a live range, if the value of the range /// is live in any MBB returns true as well as the list of basic blocks /// in which the value is live. - bool findLiveInMBBs(MachineInstrIndex Start, MachineInstrIndex End, + bool findLiveInMBBs(LiveIndex Start, LiveIndex End, SmallVectorImpl<MachineBasicBlock*> &MBBs) const; /// findReachableMBBs - Return a list MBB that can be reached via any /// branch or fallthroughs. Return true if the list is not empty. - bool findReachableMBBs(MachineInstrIndex Start, MachineInstrIndex End, + bool findReachableMBBs(LiveIndex Start, LiveIndex End, SmallVectorImpl<MachineBasicBlock*> &MBBs) const; // Interval creation @@ -353,7 +353,7 @@ namespace llvm { i2miMap_[mi2i->second.index/InstrSlots::NUM] = NewMI; Mi2IndexMap::iterator it = mi2iMap_.find(MI); assert(it != mi2iMap_.end() && "Invalid instruction!"); - MachineInstrIndex Index = it->second; + LiveIndex Index = it->second; mi2iMap_.erase(it); mi2iMap_[NewMI] = Index; } @@ -444,14 +444,14 @@ namespace llvm { /// handleVirtualRegisterDef) void handleRegisterDef(MachineBasicBlock *MBB, MachineBasicBlock::iterator MI, - MachineInstrIndex MIIdx, + LiveIndex MIIdx, MachineOperand& MO, unsigned MOIdx); /// handleVirtualRegisterDef - update intervals for a virtual /// register def void handleVirtualRegisterDef(MachineBasicBlock *MBB, MachineBasicBlock::iterator MI, - MachineInstrIndex MIIdx, MachineOperand& MO, + LiveIndex MIIdx, MachineOperand& MO, unsigned MOIdx, LiveInterval& interval); @@ -459,13 +459,13 @@ namespace llvm { /// def. void handlePhysicalRegisterDef(MachineBasicBlock* mbb, MachineBasicBlock::iterator mi, - MachineInstrIndex MIIdx, MachineOperand& MO, + LiveIndex MIIdx, MachineOperand& MO, LiveInterval &interval, MachineInstr *CopyMI); /// handleLiveInRegister - Create interval for a livein register. void handleLiveInRegister(MachineBasicBlock* mbb, - MachineInstrIndex MIIdx, + LiveIndex MIIdx, LiveInterval &interval, bool isAlias = false); /// getReMatImplicitUse - If the remat definition MI has one (for now, we @@ -478,7 +478,7 @@ namespace llvm { /// which reaches the given instruction also reaches the specified use /// index. bool isValNoAvailableAt(const LiveInterval &li, MachineInstr *MI, - MachineInstrIndex UseIdx) const; + LiveIndex UseIdx) const; /// isReMaterializable - Returns true if the definition MI of the specified /// val# of the specified interval is re-materializable. Also returns true @@ -493,7 +493,7 @@ namespace llvm { /// MI. If it is successul, MI is updated with the newly created MI and /// returns true. bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, - MachineInstr *DefMI, MachineInstrIndex InstrIdx, + MachineInstr *DefMI, LiveIndex InstrIdx, SmallVector<unsigned, 2> &Ops, bool isSS, int FrameIndex, unsigned Reg); @@ -507,7 +507,7 @@ namespace llvm { /// VNInfo that's after the specified index but is within the basic block. bool anyKillInMBBAfterIdx(const LiveInterval &li, const VNInfo *VNI, MachineBasicBlock *MBB, - MachineInstrIndex Idx) const; + LiveIndex Idx) const; /// hasAllocatableSuperReg - Return true if the specified physical register /// has any super register that's allocatable. @@ -515,17 +515,17 @@ namespace llvm { /// SRInfo - Spill / restore info. struct SRInfo { - MachineInstrIndex index; + LiveIndex index; unsigned vreg; bool canFold; - SRInfo(MachineInstrIndex i, unsigned vr, bool f) + SRInfo(LiveIndex i, unsigned vr, bool f) : index(i), vreg(vr), canFold(f) {} }; - bool alsoFoldARestore(int Id, MachineInstrIndex index, unsigned vr, + bool alsoFoldARestore(int Id, LiveIndex index, unsigned vr, BitVector &RestoreMBBs, DenseMap<unsigned,std::vector<SRInfo> >&RestoreIdxes); - void eraseRestoreInfo(int Id, MachineInstrIndex index, unsigned vr, + void eraseRestoreInfo(int Id, LiveIndex index, unsigned vr, BitVector &RestoreMBBs, DenseMap<unsigned,std::vector<SRInfo> >&RestoreIdxes); @@ -544,7 +544,7 @@ namespace llvm { /// functions for addIntervalsForSpills to rewrite uses / defs for the given /// live range. bool rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI, - bool TrySplit, MachineInstrIndex index, MachineInstrIndex end, + bool TrySplit, LiveIndex index, LiveIndex end, MachineInstr *MI, MachineInstr *OrigDefMI, MachineInstr *DefMI, unsigned Slot, int LdSlot, bool isLoad, bool isLoadSS, bool DefIsReMat, bool CanDelete, diff --git a/lib/CodeGen/LiveInterval.cpp b/lib/CodeGen/LiveInterval.cpp index 38b9401..017c3c4 100644 --- a/lib/CodeGen/LiveInterval.cpp +++ b/lib/CodeGen/LiveInterval.cpp @@ -28,8 +28,8 @@ #include <algorithm> using namespace llvm; -// Print a MachineInstrIndex to a raw_ostream. -void MachineInstrIndex::print(raw_ostream &os) const { +// Print a LiveIndex to a raw_ostream. +void LiveIndex::print(raw_ostream &os) const { os << (index & ~PHI_BIT); } @@ -40,7 +40,7 @@ void MachineInstrIndex::print(raw_ostream &os) const { // variable it represents. This is because slot 1 is used (def slot) and spans // up to slot 3 (store slot). // -bool LiveInterval::liveAt(MachineInstrIndex I) const { +bool LiveInterval::liveAt(LiveIndex I) const { Ranges::const_iterator r = std::upper_bound(ranges.begin(), ranges.end(), I); if (r == ranges.begin()) @@ -53,7 +53,7 @@ bool LiveInterval::liveAt(MachineInstrIndex I) const { // liveBeforeAndAt - Check if the interval is live at the index and the index // just before it. If index is liveAt, check if it starts a new live range. // If it does, then check if the previous live range ends at index-1. -bool LiveInterval::liveBeforeAndAt(MachineInstrIndex I) const { +bool LiveInterval::liveBeforeAndAt(LiveIndex I) const { Ranges::const_iterator r = std::upper_bound(ranges.begin(), ranges.end(), I); if (r == ranges.begin()) @@ -131,7 +131,7 @@ bool LiveInterval::overlapsFrom(const LiveInterval& other, /// overlaps - Return true if the live interval overlaps a range specified /// by [Start, End). -bool LiveInterval::overlaps(MachineInstrIndex Start, MachineInstrIndex End) const { +bool LiveInterval::overlaps(LiveIndex Start, MachineInstrIndex End) const { assert(Start < End && "Invalid range"); const_iterator I = begin(); const_iterator E = end(); @@ -149,10 +149,10 @@ bool LiveInterval::overlaps(MachineInstrIndex Start, MachineInstrIndex End) cons /// specified by I to end at the specified endpoint. To do this, we should /// merge and eliminate all ranges that this will overlap with. The iterator is /// not invalidated. -void LiveInterval::extendIntervalEndTo(Ranges::iterator I, MachineInstrIndex NewEnd) { +void LiveInterval::extendIntervalEndTo(Ranges::iterator I, LiveIndex NewEnd) { assert(I != ranges.end() && "Not a valid interval!"); VNInfo *ValNo = I->valno; - MachineInstrIndex OldEnd = I->end; + LiveIndex OldEnd = I->end; // Search for the first interval that we can't merge with. Ranges::iterator MergeTo = next(I); @@ -183,7 +183,7 @@ void LiveInterval::extendIntervalEndTo(Ranges::iterator I, MachineInstrIndex New /// specified by I to start at the specified endpoint. To do this, we should /// merge and eliminate all ranges that this will overlap with. LiveInterval::Ranges::iterator -LiveInterval::extendIntervalStartTo(Ranges::iterator I, MachineInstrIndex NewStart) { +LiveInterval::extendIntervalStartTo(Ranges::iterator I, LiveIndex NewStart) { assert(I != ranges.end() && "Not a valid interval!"); VNInfo *ValNo = I->valno; @@ -216,7 +216,7 @@ LiveInterval::extendIntervalStartTo(Ranges::iterator I, MachineInstrIndex NewSta LiveInterval::iterator LiveInterval::addRangeFrom(LiveRange LR, iterator From) { - MachineInstrIndex Start = LR.start, End = LR.end; + LiveIndex Start = LR.start, End = LR.end; iterator it = std::upper_bound(From, ranges.end(), Start); // If the inserted interval starts in the middle or right at the end of @@ -268,7 +268,7 @@ LiveInterval::addRangeFrom(LiveRange LR, iterator From) { /// isInOneLiveRange - Return true if the range specified is entirely in /// a single LiveRange of the live interval. -bool LiveInterval::isInOneLiveRange(MachineInstrIndex Start, MachineInstrIndex End) { +bool LiveInterval::isInOneLiveRange(LiveIndex Start, MachineInstrIndex End) { Ranges::iterator I = std::upper_bound(ranges.begin(), ranges.end(), Start); if (I == ranges.begin()) return false; @@ -279,7 +279,7 @@ bool LiveInterval::isInOneLiveRange(MachineInstrIndex Start, MachineInstrIndex E /// removeRange - Remove the specified range from this interval. Note that /// the range must be in a single LiveRange in its entirety. -void LiveInterval::removeRange(MachineInstrIndex Start, MachineInstrIndex End, +void LiveInterval::removeRange(LiveIndex Start, MachineInstrIndex End, bool RemoveDeadValNo) { // Find the LiveRange containing this span. Ranges::iterator I = std::upper_bound(ranges.begin(), ranges.end(), Start); @@ -331,7 +331,7 @@ void LiveInterval::removeRange(MachineInstrIndex Start, MachineInstrIndex End, } // Otherwise, we are splitting the LiveRange into two pieces. - MachineInstrIndex OldEnd = I->end; + LiveIndex OldEnd = I->end; I->end = Start; // Trim the old interval. // Insert the new one. @@ -391,7 +391,7 @@ void LiveInterval::scaleNumbering(unsigned factor) { /// getLiveRangeContaining - Return the live range that contains the /// specified index, or null if there is none. LiveInterval::const_iterator -LiveInterval::FindLiveRangeContaining(MachineInstrIndex Idx) const { +LiveInterval::FindLiveRangeContaining(LiveIndex Idx) const { const_iterator It = std::upper_bound(begin(), end(), Idx); if (It != ranges.begin()) { --It; @@ -403,7 +403,7 @@ LiveInterval::FindLiveRangeContaining(MachineInstrIndex Idx) const { } LiveInterval::iterator -LiveInterval::FindLiveRangeContaining(MachineInstrIndex Idx) { +LiveInterval::FindLiveRangeContaining(LiveIndex Idx) { iterator It = std::upper_bound(begin(), end(), Idx); if (It != begin()) { --It; @@ -416,7 +416,7 @@ LiveInterval::FindLiveRangeContaining(MachineInstrIndex Idx) { /// findDefinedVNInfo - Find the VNInfo defined by the specified /// index (register interval). -VNInfo *LiveInterval::findDefinedVNInfoForRegInt(MachineInstrIndex Idx) const { +VNInfo *LiveInterval::findDefinedVNInfoForRegInt(LiveIndex Idx) const { for (LiveInterval::const_vni_iterator i = vni_begin(), e = vni_end(); i != e; ++i) { if ((*i)->def == Idx) @@ -561,7 +561,7 @@ void LiveInterval::MergeValueInAsValue(const LiveInterval &RHS, for (const_iterator I = RHS.begin(), E = RHS.end(); I != E; ++I) { if (I->valno != RHSValNo) continue; - MachineInstrIndex Start = I->start, End = I->end; + LiveIndex Start = I->start, End = I->end; IP = std::upper_bound(IP, end(), Start); // If the start of this range overlaps with an existing liverange, trim it. if (IP != begin() && IP[-1].end > Start) { @@ -638,20 +638,20 @@ void LiveInterval::MergeInClobberRanges(const LiveInterval &Clobbers, ClobberValNo = UnusedValNo; else { UnusedValNo = ClobberValNo = - getNextValue(MachineInstrIndex(), 0, false, VNInfoAllocator); + getNextValue(LiveIndex(), 0, false, VNInfoAllocator); ValNoMaps.insert(std::make_pair(I->valno, ClobberValNo)); } bool Done = false; - MachineInstrIndex Start = I->start, End = I->end; + LiveIndex Start = I->start, End = I->end; // If a clobber range starts before an existing range and ends after // it, the clobber range will need to be split into multiple ranges. // Loop until the entire clobber range is handled. while (!Done) { Done = true; IP = std::upper_bound(IP, end(), Start); - MachineInstrIndex SubRangeStart = Start; - MachineInstrIndex SubRangeEnd = End; + LiveIndex SubRangeStart = Start; + LiveIndex SubRangeEnd = End; // If the start of this range overlaps with an existing liverange, trim it. if (IP != begin() && IP[-1].end > SubRangeStart) { @@ -687,13 +687,13 @@ void LiveInterval::MergeInClobberRanges(const LiveInterval &Clobbers, } } -void LiveInterval::MergeInClobberRange(MachineInstrIndex Start, - MachineInstrIndex End, +void LiveInterval::MergeInClobberRange(LiveIndex Start, + LiveIndex End, BumpPtrAllocator &VNInfoAllocator) { // Find a value # to use for the clobber ranges. If there is already a value# // for unknown values, use it. VNInfo *ClobberValNo = - getNextValue(MachineInstrIndex(), 0, false, VNInfoAllocator); + getNextValue(LiveIndex(), 0, false, VNInfoAllocator); iterator IP = begin(); IP = std::upper_bound(IP, end(), Start); diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 4f4bb9b..c1072af 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -292,12 +292,12 @@ void LiveIntervals::computeNumbering() { // Number MachineInstrs and MachineBasicBlocks. // Initialize MBB indexes to a sentinal. MBB2IdxMap.resize(mf_->getNumBlockIDs(), - std::make_pair(MachineInstrIndex(),MachineInstrIndex())); + std::make_pair(LiveIndex(),MachineInstrIndex())); - MachineInstrIndex MIIndex; + LiveIndex MIIndex; for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); MBB != E; ++MBB) { - MachineInstrIndex StartIdx = MIIndex; + LiveIndex StartIdx = MIIndex; // Insert an empty slot at the beginning of each block. MIIndex = getNextIndex(MIIndex); @@ -309,7 +309,7 @@ void LiveIntervals::computeNumbering() { if (I == MBB->getFirstTerminator()) { // Leave a gap for before terminators, this is where we will point // PHI kills. - MachineInstrIndex tGap(true, MIIndex); + LiveIndex tGap(true, MIIndex); bool inserted = terminatorGaps.insert(std::make_pair(&*MBB, tGap)).second; assert(inserted && @@ -341,7 +341,7 @@ void LiveIntervals::computeNumbering() { if (MBB->getFirstTerminator() == MBB->end()) { // Leave a gap for before terminators, this is where we will point // PHI kills. - MachineInstrIndex tGap(true, MIIndex); + LiveIndex tGap(true, MIIndex); bool inserted = terminatorGaps.insert(std::make_pair(&*MBB, tGap)).second; assert(inserted && @@ -369,7 +369,7 @@ void LiveIntervals::computeNumbering() { // original instruction has been erased. This is either the following // instruction or its predecessor. unsigned index = LI->start.getVecIndex(); - MachineInstrIndex::Slot offset = LI->start.getSlot(); + LiveIndex::Slot offset = LI->start.getSlot(); if (LI->start.isLoad()) { std::vector<IdxMBBPair>::const_iterator I = std::lower_bound(OldI2MBB.begin(), OldI2MBB.end(), LI->start); @@ -379,9 +379,9 @@ void LiveIntervals::computeNumbering() { LI->start = getMBBStartIdx(J->second); } else { - LI->start = MachineInstrIndex( - MachineInstrIndex(mi2iMap_[OldI2MI[index]]), - (MachineInstrIndex::Slot)offset); + LI->start = LiveIndex( + LiveIndex(mi2iMap_[OldI2MI[index]]), + (LiveIndex::Slot)offset); } // Remap the ending index in the same way that we remapped the start, @@ -402,11 +402,11 @@ void LiveIntervals::computeNumbering() { if (index != OldI2MI.size()) LI->end = - MachineInstrIndex(mi2iMap_[OldI2MI[index]], - (idx == index ? offset : MachineInstrIndex::LOAD)); + LiveIndex(mi2iMap_[OldI2MI[index]], + (idx == index ? offset : LiveIndex::LOAD)); else LI->end = - MachineInstrIndex(MachineInstrIndex::NUM * i2miMap_.size()); + LiveIndex(MachineInstrIndex::NUM * i2miMap_.size()); } } @@ -419,7 +419,7 @@ void LiveIntervals::computeNumbering() { // don't need to be remapped. if (vni->isDefAccurate() && !vni->isUnused()) { unsigned index = vni->def.getVecIndex(); - MachineInstrIndex::Slot offset = vni->def.getSlot(); + LiveIndex::Slot offset = vni->def.getSlot(); if (vni->def.isLoad()) { std::vector<IdxMBBPair>::const_iterator I = std::lower_bound(OldI2MBB.begin(), OldI2MBB.end(), vni->def); @@ -429,7 +429,7 @@ void LiveIntervals::computeNumbering() { vni->def = getMBBStartIdx(J->second); } else { - vni->def = MachineInstrIndex(mi2iMap_[OldI2MI[index]], offset); + vni->def = LiveIndex(mi2iMap_[OldI2MI[index]], offset); } } @@ -437,7 +437,7 @@ void LiveIntervals::computeNumbering() { // the end indices above. for (size_t i = 0; i < vni->kills.size(); ++i) { unsigned index = getPrevSlot(vni->kills[i]).getVecIndex(); - MachineInstrIndex::Slot offset = vni->kills[i].getSlot(); + LiveIndex::Slot offset = vni->kills[i].getSlot(); if (vni->kills[i].isLoad()) { assert("Value killed at a load slot."); @@ -455,7 +455,7 @@ void LiveIntervals::computeNumbering() { } else { assert(OldI2MI[index] != 0 && "Kill refers to instruction not present in index maps."); - vni->kills[i] = MachineInstrIndex(mi2iMap_[OldI2MI[index]], offset); + vni->kills[i] = LiveIndex(mi2iMap_[OldI2MI[index]], offset); } /* @@ -485,7 +485,7 @@ void LiveIntervals::scaleNumbering(int factor) { Idx2MBBMap.clear(); for (MachineFunction::iterator MBB = mf_->begin(), MBBE = mf_->end(); MBB != MBBE; ++MBB) { - std::pair<MachineInstrIndex, MachineInstrIndex> &mbbIndices = MBB2IdxMap[MBB->getNumber()]; + std::pair<LiveIndex, MachineInstrIndex> &mbbIndices = MBB2IdxMap[MBB->getNumber()]; mbbIndices.first = mbbIndices.first.scale(factor); mbbIndices.second = mbbIndices.second.scale(factor); Idx2MBBMap.push_back(std::make_pair(mbbIndices.first, MBB)); @@ -493,7 +493,7 @@ void LiveIntervals::scaleNumbering(int factor) { std::sort(Idx2MBBMap.begin(), Idx2MBBMap.end(), Idx2MBBCompare()); // Scale terminator gaps. - for (DenseMap<MachineBasicBlock*, MachineInstrIndex>::iterator + for (DenseMap<MachineBasicBlock*, LiveIndex>::iterator TGI = terminatorGaps.begin(), TGE = terminatorGaps.end(); TGI != TGE; ++TGI) { terminatorGaps[TGI->first] = TGI->second.scale(factor); @@ -506,10 +506,10 @@ void LiveIntervals::scaleNumbering(int factor) { // Scale MachineInstrs. Mi2IndexMap oldmi2iMap = mi2iMap_; - MachineInstrIndex highestSlot; + LiveIndex highestSlot; for (Mi2IndexMap::iterator MI = oldmi2iMap.begin(), ME = oldmi2iMap.end(); MI != ME; ++MI) { - MachineInstrIndex newSlot = MI->second.scale(factor); + LiveIndex newSlot = MI->second.scale(factor); mi2iMap_[MI->first] = newSlot; highestSlot = std::max(highestSlot, newSlot); } @@ -582,7 +582,7 @@ bool LiveIntervals::conflictsWithPhysRegDef(const LiveInterval &li, VirtRegMap &vrm, unsigned reg) { for (LiveInterval::Ranges::const_iterator I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) { - for (MachineInstrIndex index = getBaseIndex(I->start), + for (LiveIndex index = getBaseIndex(I->start), end = getNextIndex(getBaseIndex(getPrevSlot(I->end))); index != end; index = getNextIndex(index)) { // skip deleted instructions @@ -623,7 +623,7 @@ bool LiveIntervals::conflictsWithPhysRegRef(LiveInterval &li, SmallPtrSet<MachineInstr*,32> &JoinedCopies) { for (LiveInterval::Ranges::const_iterator I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) { - for (MachineInstrIndex index = getBaseIndex(I->start), + for (LiveIndex index = getBaseIndex(I->start), end = getNextIndex(getBaseIndex(getPrevSlot(I->end))); index != end; index = getNextIndex(index)) { // Skip deleted instructions. @@ -667,7 +667,7 @@ static void printRegName(unsigned reg, const TargetRegisterInfo* tri_) { void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, MachineBasicBlock::iterator mi, - MachineInstrIndex MIIdx, + LiveIndex MIIdx, MachineOperand& MO, unsigned MOIdx, LiveInterval &interval) { @@ -683,7 +683,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg); if (interval.empty()) { // Get the Idx of the defining instructions. - MachineInstrIndex defIndex = getDefIndex(MIIdx); + LiveIndex defIndex = getDefIndex(MIIdx); // Earlyclobbers move back one, so that they overlap the live range // of inputs. if (MO.isEarlyClobber()) @@ -707,7 +707,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // will be a single kill, in MBB, which comes after the definition. if (vi.Kills.size() == 1 && vi.Kills[0]->getParent() == mbb) { // FIXME: what about dead vars? - MachineInstrIndex killIdx; + LiveIndex killIdx; if (vi.Kills[0] != mi) killIdx = getNextSlot(getUseIndex(getInstructionIndex(vi.Kills[0]))); else if (MO.isEarlyClobber()) @@ -755,7 +755,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // block to the 'use' slot of the killing instruction. for (unsigned i = 0, e = vi.Kills.size(); i != e; ++i) { MachineInstr *Kill = vi.Kills[i]; - MachineInstrIndex killIdx = + LiveIndex killIdx = getNextSlot(getUseIndex(getInstructionIndex(Kill))); LiveRange LR(getMBBStartIdx(Kill->getParent()), killIdx, ValNo); interval.addRange(LR); @@ -775,8 +775,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // need to take the LiveRegion that defines this register and split it // into two values. assert(interval.containsOneValue()); - MachineInstrIndex DefIndex = getDefIndex(interval.getValNumInfo(0)->def); - MachineInstrIndex RedefIndex = getDefIndex(MIIdx); + LiveIndex DefIndex = getDefIndex(interval.getValNumInfo(0)->def); + LiveIndex RedefIndex = getDefIndex(MIIdx); if (MO.isEarlyClobber()) RedefIndex = getUseIndex(MIIdx); @@ -832,8 +832,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, VNInfo *VNI = interval.getValNumInfo(0); MachineInstr *Killer = vi.Kills[0]; phiJoinCopies.push_back(Killer); - MachineInstrIndex Start = getMBBStartIdx(Killer->getParent()); - MachineInstrIndex End = + LiveIndex Start = getMBBStartIdx(Killer->getParent()); + LiveIndex End = getNextSlot(getUseIndex(getInstructionIndex(Killer))); DEBUG({ errs() << " Removing [" << Start << "," << End << "] from: "; @@ -854,7 +854,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // Replace the interval with one of a NEW value number. Note that this // value number isn't actually defined by an instruction, weird huh? :) LiveRange LR(Start, End, - interval.getNextValue(MachineInstrIndex(mbb->getNumber()), + interval.getNextValue(LiveIndex(mbb->getNumber()), 0, false, VNInfoAllocator)); LR.valno->setIsPHIDef(true); DEBUG(errs() << " replace range with " << LR); @@ -869,7 +869,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // In the case of PHI elimination, each variable definition is only // live until the end of the block. We've already taken care of the // rest of the live range. - MachineInstrIndex defIndex = getDefIndex(MIIdx); + LiveIndex defIndex = getDefIndex(MIIdx); if (MO.isEarlyClobber()) defIndex = getUseIndex(MIIdx); @@ -883,7 +883,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, CopyMI = mi; ValNo = interval.getNextValue(defIndex, CopyMI, true, VNInfoAllocator); - MachineInstrIndex killIndex = getNextSlot(getMBBEndIdx(mbb)); + LiveIndex killIndex = getNextSlot(getMBBEndIdx(mbb)); LiveRange LR(defIndex, killIndex, ValNo); interval.addRange(LR); ValNo->addKill(terminatorGaps[mbb]); @@ -897,7 +897,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB, MachineBasicBlock::iterator mi, - MachineInstrIndex MIIdx, + LiveIndex MIIdx, MachineOperand& MO, LiveInterval &interval, MachineInstr *CopyMI) { @@ -908,12 +908,12 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB, printRegName(interval.reg, tri_); }); - MachineInstrIndex baseIndex = MIIdx; - MachineInstrIndex start = getDefIndex(baseIndex); + LiveIndex baseIndex = MIIdx; + LiveIndex start = getDefIndex(baseIndex); // Earlyclobbers move back one. if (MO.isEarlyClobber()) start = getUseIndex(MIIdx); - MachineInstrIndex end = start; + LiveIndex end = start; // If it is not used after definition, it is considered dead at // the instruction defining it. Hence its interval is: @@ -988,7 +988,7 @@ exit: void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB, MachineBasicBlock::iterator MI, - MachineInstrIndex MIIdx, + LiveIndex MIIdx, MachineOperand& MO, unsigned MOIdx) { if (TargetRegisterInfo::isVirtualRegister(MO.getReg())) @@ -1015,7 +1015,7 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB, } void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB, - MachineInstrIndex MIIdx, + LiveIndex MIIdx, LiveInterval &interval, bool isAlias) { DEBUG({ errs() << "\t\tlivein register: "; @@ -1025,12 +1025,12 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB, // Look for kills, if it reaches a def before it's killed, then it shouldn't // be considered a livein. MachineBasicBlock::iterator mi = MBB->begin(); - MachineInstrIndex baseIndex = MIIdx; - MachineInstrIndex start = baseIndex; + LiveIndex baseIndex = MIIdx; + LiveIndex start = baseIndex; while (baseIndex.getVecIndex() < i2miMap_.size() && getInstructionFromIndex(baseIndex) == 0) baseIndex = getNextIndex(baseIndex); - MachineInstrIndex end = baseIndex; + LiveIndex end = baseIndex; bool SeenDefUse = false; while (mi != MBB->end()) { @@ -1071,7 +1071,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB, } VNInfo *vni = - interval.getNextValue(MachineInstrIndex(MBB->getNumber()), + interval.getNextValue(LiveIndex(MBB->getNumber()), 0, false, VNInfoAllocator); vni->setIsPHIDef(true); LiveRange LR(start, end, vni); @@ -1142,11 +1142,11 @@ void LiveIntervals::performEarlyCoalescing() { MachineInstr *PHICopy = OtherCopies[i]; DEBUG(errs() << "Moving: " << *PHICopy); - MachineInstrIndex MIIndex = getInstructionIndex(PHICopy); - MachineInstrIndex DefIndex = getDefIndex(MIIndex); + LiveIndex MIIndex = getInstructionIndex(PHICopy); + LiveIndex DefIndex = getDefIndex(MIIndex); LiveRange *SLR = SrcInt.getLiveRangeContaining(DefIndex); - MachineInstrIndex StartIndex = SLR->start; - MachineInstrIndex EndIndex = SLR->end; + LiveIndex StartIndex = SLR->start; + LiveIndex EndIndex = SLR->end; // Delete val# defined by the now identity copy and add the range from // beginning of the mbb to the end of the range. @@ -1172,11 +1172,11 @@ void LiveIntervals::performEarlyCoalescing() { MachineInstr *PHICopy = IdentCopies[i]; DEBUG(errs() << "Coalescing: " << *PHICopy); - MachineInstrIndex MIIndex = getInstructionIndex(PHICopy); - MachineInstrIndex DefIndex = getDefIndex(MIIndex); + LiveIndex MIIndex = getInstructionIndex(PHICopy); + LiveIndex DefIndex = getDefIndex(MIIndex); LiveRange *SLR = SrcInt.getLiveRangeContaining(DefIndex); - MachineInstrIndex StartIndex = SLR->start; - MachineInstrIndex EndIndex = SLR->end; + LiveIndex StartIndex = SLR->start; + LiveIndex EndIndex = SLR->end; // Delete val# defined by the now identity copy and add the range from // beginning of the mbb to the end of the range. @@ -1189,9 +1189,9 @@ void LiveIntervals::performEarlyCoalescing() { } // Remove the phi join and update the phi block liveness. - MachineInstrIndex MIIndex = getInstructionIndex(Join); - MachineInstrIndex UseIndex = getUseIndex(MIIndex); - MachineInstrIndex DefIndex = getDefIndex(MIIndex); + LiveIndex MIIndex = getInstructionIndex(Join); + LiveIndex UseIndex = getUseIndex(MIIndex); + LiveIndex DefIndex = getDefIndex(MIIndex); LiveRange *SLR = SrcInt.getLiveRangeContaining(UseIndex); LiveRange *DLR = DstInt.getLiveRangeContaining(DefIndex); DLR->valno->setCopy(0); @@ -1221,7 +1221,7 @@ void LiveIntervals::computeIntervals() { MBBI != E; ++MBBI) { MachineBasicBlock *MBB = MBBI; // Track the index of the current machine instr. - MachineInstrIndex MIIndex = getMBBStartIdx(MBB); + LiveIndex MIIndex = getMBBStartIdx(MBB); DEBUG(errs() << ((Value*)MBB->getBasicBlock())->getName() << ":\n"); MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end(); @@ -1283,7 +1283,7 @@ void LiveIntervals::computeIntervals() { } bool LiveIntervals::findLiveInMBBs( - MachineInstrIndex Start, MachineInstrIndex End, + LiveIndex Start, MachineInstrIndex End, SmallVectorImpl<MachineBasicBlock*> &MBBs) const { std::vector<IdxMBBPair>::const_iterator I = std::lower_bound(Idx2MBBMap.begin(), Idx2MBBMap.end(), Start); @@ -1300,7 +1300,7 @@ bool LiveIntervals::findLiveInMBBs( } bool LiveIntervals::findReachableMBBs( - MachineInstrIndex Start, MachineInstrIndex End, + LiveIndex Start, MachineInstrIndex End, SmallVectorImpl<MachineBasicBlock*> &MBBs) const { std::vector<IdxMBBPair>::const_iterator I = std::lower_bound(Idx2MBBMap.begin(), Idx2MBBMap.end(), Start); @@ -1392,8 +1392,8 @@ unsigned LiveIntervals::getReMatImplicitUse(const LiveInterval &li, /// isValNoAvailableAt - Return true if the val# of the specified interval /// which reaches the given instruction also reaches the specified use index. bool LiveIntervals::isValNoAvailableAt(const LiveInterval &li, MachineInstr *MI, - MachineInstrIndex UseIdx) const { - MachineInstrIndex Index = getInstructionIndex(MI); + LiveIndex UseIdx) const { + LiveIndex Index = getInstructionIndex(MI); VNInfo *ValNo = li.FindLiveRangeContaining(Index)->valno; LiveInterval::const_iterator UI = li.FindLiveRangeContaining(UseIdx); return UI != li.end() && UI->valno == ValNo; @@ -1503,7 +1503,7 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li, for (MachineRegisterInfo::use_iterator ri = mri_->use_begin(li.reg), re = mri_->use_end(); ri != re; ++ri) { MachineInstr *UseMI = &*ri; - MachineInstrIndex UseIdx = getInstructionIndex(UseMI); + LiveIndex UseIdx = getInstructionIndex(UseMI); if (li.FindLiveRangeContaining(UseIdx)->valno != ValNo) continue; if (!isValNoAvailableAt(ImpLi, MI, UseIdx)) @@ -1588,7 +1588,7 @@ static bool FilterFoldedOps(MachineInstr *MI, /// returns true. bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, MachineInstr *DefMI, - MachineInstrIndex InstrIdx, + LiveIndex InstrIdx, SmallVector<unsigned, 2> &Ops, bool isSS, int Slot, unsigned Reg) { // If it is an implicit def instruction, just delete it. @@ -1700,7 +1700,7 @@ void LiveIntervals::rewriteImplicitOps(const LiveInterval &li, /// for addIntervalsForSpills to rewrite uses / defs for the given live range. bool LiveIntervals:: rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI, - bool TrySplit, MachineInstrIndex index, MachineInstrIndex end, + bool TrySplit, LiveIndex index, MachineInstrIndex end, MachineInstr *MI, MachineInstr *ReMatOrigDefMI, MachineInstr *ReMatDefMI, unsigned Slot, int LdSlot, @@ -1878,13 +1878,13 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI, if (HasUse) { if (CreatedNewVReg) { LiveRange LR(getLoadIndex(index), getNextSlot(getUseIndex(index)), - nI.getNextValue(MachineInstrIndex(), 0, false, + nI.getNextValue(LiveIndex(), 0, false, VNInfoAllocator)); DEBUG(errs() << " +" << LR); nI.addRange(LR); } else { // Extend the split live interval to this def / use. - MachineInstrIndex End = getNextSlot(getUseIndex(index)); + LiveIndex End = getNextSlot(getUseIndex(index)); LiveRange LR(nI.ranges[nI.ranges.size()-1].end, End, nI.getValNumInfo(nI.getNumValNums()-1)); DEBUG(errs() << " +" << LR); @@ -1893,7 +1893,7 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI, } if (HasDef) { LiveRange LR(getDefIndex(index), getStoreIndex(index), - nI.getNextValue(MachineInstrIndex(), 0, false, + nI.getNextValue(LiveIndex(), 0, false, VNInfoAllocator)); DEBUG(errs() << " +" << LR); nI.addRange(LR); @@ -1910,13 +1910,13 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI, bool LiveIntervals::anyKillInMBBAfterIdx(const LiveInterval &li, const VNInfo *VNI, MachineBasicBlock *MBB, - MachineInstrIndex Idx) const { - MachineInstrIndex End = getMBBEndIdx(MBB); + LiveIndex Idx) const { + LiveIndex End = getMBBEndIdx(MBB); for (unsigned j = 0, ee = VNI->kills.size(); j != ee; ++j) { if (VNI->kills[j].isPHIIndex()) continue; - MachineInstrIndex KillIdx = VNI->kills[j]; + LiveIndex KillIdx = VNI->kills[j]; if (KillIdx > Idx && KillIdx < End) return true; } @@ -1927,11 +1927,11 @@ bool LiveIntervals::anyKillInMBBAfterIdx(const LiveInterval &li, /// during spilling. namespace { struct RewriteInfo { - MachineInstrIndex Index; + LiveIndex Index; MachineInstr *MI; bool HasUse; bool HasDef; - RewriteInfo(MachineInstrIndex i, MachineInstr *mi, bool u, bool d) + RewriteInfo(LiveIndex i, MachineInstr *mi, bool u, bool d) : Index(i), MI(mi), HasUse(u), HasDef(d) {} }; @@ -1960,8 +1960,8 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit, std::vector<LiveInterval*> &NewLIs) { bool AllCanFold = true; unsigned NewVReg = 0; - MachineInstrIndex start = getBaseIndex(I->start); - MachineInstrIndex end = getNextIndex(getBaseIndex(getPrevSlot(I->end))); + LiveIndex start = getBaseIndex(I->start); + LiveIndex end = getNextIndex(getBaseIndex(getPrevSlot(I->end))); // First collect all the def / use in this live range that will be rewritten. // Make sure they are sorted according to instruction index. @@ -1972,7 +1972,7 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit, MachineOperand &O = ri.getOperand(); ++ri; assert(!O.isImplicit() && "Spilling register that's used as implicit use?"); - MachineInstrIndex index = getInstructionIndex(MI); + LiveIndex index = getInstructionIndex(MI); if (index < start || index >= end) continue; @@ -1996,7 +1996,7 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit, for (unsigned i = 0, e = RewriteMIs.size(); i != e; ) { RewriteInfo &rwi = RewriteMIs[i]; ++i; - MachineInstrIndex index = rwi.Index; + LiveIndex index = rwi.Index; bool MIHasUse = rwi.HasUse; bool MIHasDef = rwi.HasDef; MachineInstr *MI = rwi.MI; @@ -2157,7 +2157,7 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit, } } -bool LiveIntervals::alsoFoldARestore(int Id, MachineInstrIndex index, +bool LiveIntervals::alsoFoldARestore(int Id, LiveIndex index, unsigned vr, BitVector &RestoreMBBs, DenseMap<unsigned,std::vector<SRInfo> > &RestoreIdxes) { if (!RestoreMBBs[Id]) @@ -2171,7 +2171,7 @@ bool LiveIntervals::alsoFoldARestore(int Id, MachineInstrIndex index, return false; } -void LiveIntervals::eraseRestoreInfo(int Id, MachineInstrIndex index, +void LiveIntervals::eraseRestoreInfo(int Id, LiveIndex index, unsigned vr, BitVector &RestoreMBBs, DenseMap<unsigned,std::vector<SRInfo> > &RestoreIdxes) { if (!RestoreMBBs[Id]) @@ -2179,7 +2179,7 @@ void LiveIntervals::eraseRestoreInfo(int Id, MachineInstrIndex index, std::vector<SRInfo> &Restores = RestoreIdxes[Id]; for (unsigned i = 0, e = Restores.size(); i != e; ++i) if (Restores[i].index == index && Restores[i].vreg) - Restores[i].index = MachineInstrIndex(); + Restores[i].index = LiveIndex(); } /// handleSpilledImpDefs - Remove IMPLICIT_DEF instructions which are being @@ -2278,10 +2278,10 @@ addIntervalsForSpillsFast(const LiveInterval &li, } // Fill in the new live interval. - MachineInstrIndex index = getInstructionIndex(MI); + LiveIndex index = getInstructionIndex(MI); if (HasUse) { LiveRange LR(getLoadIndex(index), getUseIndex(index), - nI.getNextValue(MachineInstrIndex(), 0, false, + nI.getNextValue(LiveIndex(), 0, false, getVNInfoAllocator())); DEBUG(errs() << " +" << LR); nI.addRange(LR); @@ -2289,7 +2289,7 @@ addIntervalsForSpillsFast(const LiveInterval &li, } if (HasDef) { LiveRange LR(getDefIndex(index), getStoreIndex(index), - nI.getNextValue(MachineInstrIndex(), 0, false, + nI.getNextValue(LiveIndex(), 0, false, getVNInfoAllocator())); DEBUG(errs() << " +" << LR); nI.addRange(LR); @@ -2353,8 +2353,8 @@ addIntervalsForSpills(const LiveInterval &li, if (vrm.getPreSplitReg(li.reg)) { vrm.setIsSplitFromReg(li.reg, 0); // Unset the split kill marker on the last use. - MachineInstrIndex KillIdx = vrm.getKillPoint(li.reg); - if (KillIdx != MachineInstrIndex()) { + LiveIndex KillIdx = vrm.getKillPoint(li.reg); + if (KillIdx != LiveIndex()) { MachineInstr *KillMI = getInstructionFromIndex(KillIdx); assert(KillMI && "Last use disappeared?"); int KillOp = KillMI->findRegisterUseOperandIdx(li.reg, true); @@ -2480,7 +2480,7 @@ addIntervalsForSpills(const LiveInterval &li, while (Id != -1) { std::vector<SRInfo> &spills = SpillIdxes[Id]; for (unsigned i = 0, e = spills.size(); i != e; ++i) { - MachineInstrIndex index = spills[i].index; + LiveIndex index = spills[i].index; unsigned VReg = spills[i].vreg; LiveInterval &nI = getOrCreateInterval(VReg); bool isReMat = vrm.isReMaterialized(VReg); @@ -2543,8 +2543,8 @@ addIntervalsForSpills(const LiveInterval &li, while (Id != -1) { std::vector<SRInfo> &restores = RestoreIdxes[Id]; for (unsigned i = 0, e = restores.size(); i != e; ++i) { - MachineInstrIndex index = restores[i].index; - if (index == MachineInstrIndex()) + LiveIndex index = restores[i].index; + if (index == LiveIndex()) continue; unsigned VReg = restores[i].vreg; LiveInterval &nI = getOrCreateInterval(VReg); @@ -2615,7 +2615,7 @@ addIntervalsForSpills(const LiveInterval &li, LI->weight /= InstrSlots::NUM * getApproximateInstructionCount(*LI); if (!AddedKill.count(LI)) { LiveRange *LR = &LI->ranges[LI->ranges.size()-1]; - MachineInstrIndex LastUseIdx = getBaseIndex(LR->end); + LiveIndex LastUseIdx = getBaseIndex(LR->end); MachineInstr *LastUse = getInstructionFromIndex(LastUseIdx); int UseIdx = LastUse->findRegisterUseOperandIdx(LI->reg, false); assert(UseIdx != -1); @@ -2666,7 +2666,7 @@ unsigned LiveIntervals::getNumConflictsWithPhysReg(const LiveInterval &li, E = mri_->reg_end(); I != E; ++I) { MachineOperand &O = I.getOperand(); MachineInstr *MI = O.getParent(); - MachineInstrIndex Index = getInstructionIndex(MI); + LiveIndex Index = getInstructionIndex(MI); if (pli.liveAt(Index)) ++NumConflicts; } @@ -2697,11 +2697,11 @@ bool LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li, if (SeenMIs.count(MI)) continue; SeenMIs.insert(MI); - MachineInstrIndex Index = getInstructionIndex(MI); + LiveIndex Index = getInstructionIndex(MI); if (pli.liveAt(Index)) { vrm.addEmergencySpill(SpillReg, MI); - MachineInstrIndex StartIdx = getLoadIndex(Index); - MachineInstrIndex EndIdx = getNextSlot(getStoreIndex(Index)); + LiveIndex StartIdx = getLoadIndex(Index); + LiveIndex EndIdx = getNextSlot(getStoreIndex(Index)); if (pli.isInOneLiveRange(StartIdx, EndIdx)) { pli.removeRange(StartIdx, EndIdx); Cut = true; @@ -2732,12 +2732,12 @@ LiveRange LiveIntervals::addLiveRangeToEndOfBlock(unsigned reg, MachineInstr* startInst) { LiveInterval& Interval = getOrCreateInterval(reg); VNInfo* VN = Interval.getNextValue( - MachineInstrIndex(getInstructionIndex(startInst), MachineInstrIndex::DEF), + LiveIndex(getInstructionIndex(startInst), MachineInstrIndex::DEF), startInst, true, getVNInfoAllocator()); VN->setHasPHIKill(true); VN->kills.push_back(terminatorGaps[startInst->getParent()]); LiveRange LR( - MachineInstrIndex(getInstructionIndex(startInst), MachineInstrIndex::DEF), + LiveIndex(getInstructionIndex(startInst), MachineInstrIndex::DEF), getNextSlot(getMBBEndIdx(startInst->getParent())), VN); Interval.addRange(LR); diff --git a/lib/CodeGen/PreAllocSplitting.cpp b/lib/CodeGen/PreAllocSplitting.cpp index 2e20dc1..dbafcc0 100644 --- a/lib/CodeGen/PreAllocSplitting.cpp +++ b/lib/CodeGen/PreAllocSplitting.cpp @@ -68,7 +68,7 @@ namespace { MachineBasicBlock *BarrierMBB; // Barrier - Current barrier index. - MachineInstrIndex BarrierIdx; + LiveIndex BarrierIdx; // CurrLI - Current live interval being split. LiveInterval *CurrLI; @@ -83,7 +83,7 @@ namespace { DenseMap<unsigned, int> IntervalSSMap; // Def2SpillMap - A map from a def instruction index to spill index. - DenseMap<MachineInstrIndex, MachineInstrIndex> Def2SpillMap; + DenseMap<LiveIndex, MachineInstrIndex> Def2SpillMap; public: static char ID; @@ -129,23 +129,23 @@ namespace { private: MachineBasicBlock::iterator findNextEmptySlot(MachineBasicBlock*, MachineInstr*, - MachineInstrIndex&); + LiveIndex&); MachineBasicBlock::iterator findSpillPoint(MachineBasicBlock*, MachineInstr*, MachineInstr*, - SmallPtrSet<MachineInstr*, 4>&, MachineInstrIndex&); + SmallPtrSet<MachineInstr*, 4>&, LiveIndex&); MachineBasicBlock::iterator - findRestorePoint(MachineBasicBlock*, MachineInstr*, MachineInstrIndex, - SmallPtrSet<MachineInstr*, 4>&, MachineInstrIndex&); + findRestorePoint(MachineBasicBlock*, MachineInstr*, LiveIndex, + SmallPtrSet<MachineInstr*, 4>&, LiveIndex&); int CreateSpillStackSlot(unsigned, const TargetRegisterClass *); bool IsAvailableInStack(MachineBasicBlock*, unsigned, - MachineInstrIndex, MachineInstrIndex, - MachineInstrIndex&, int&) const; + LiveIndex, MachineInstrIndex, + LiveIndex&, int&) const; - void UpdateSpillSlotInterval(VNInfo*, MachineInstrIndex, MachineInstrIndex); + void UpdateSpillSlotInterval(VNInfo*, LiveIndex, MachineInstrIndex); bool SplitRegLiveInterval(LiveInterval*); @@ -157,7 +157,7 @@ namespace { bool Rematerialize(unsigned vreg, VNInfo* ValNo, MachineInstr* DefMI, MachineBasicBlock::iterator RestorePt, - MachineInstrIndex RestoreIdx, + LiveIndex RestoreIdx, SmallPtrSet<MachineInstr*, 4>& RefsInMBB); MachineInstr* FoldSpill(unsigned vreg, const TargetRegisterClass* RC, MachineInstr* DefMI, @@ -209,12 +209,12 @@ const PassInfo *const llvm::PreAllocSplittingID = &X; /// instruction index map. If there isn't one, return end(). MachineBasicBlock::iterator PreAllocSplitting::findNextEmptySlot(MachineBasicBlock *MBB, MachineInstr *MI, - MachineInstrIndex &SpotIndex) { + LiveIndex &SpotIndex) { MachineBasicBlock::iterator MII = MI; if (++MII != MBB->end()) { - MachineInstrIndex Index = + LiveIndex Index = LIs->findGapBeforeInstr(LIs->getInstructionIndex(MII)); - if (Index != MachineInstrIndex()) { + if (Index != LiveIndex()) { SpotIndex = Index; return MII; } @@ -230,7 +230,7 @@ MachineBasicBlock::iterator PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI, MachineInstr *DefMI, SmallPtrSet<MachineInstr*, 4> &RefsInMBB, - MachineInstrIndex &SpillIndex) { + LiveIndex &SpillIndex) { MachineBasicBlock::iterator Pt = MBB->begin(); MachineBasicBlock::iterator MII = MI; @@ -243,7 +243,7 @@ PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI, if (MII == EndPt || RefsInMBB.count(MII)) return Pt; while (MII != EndPt && !RefsInMBB.count(MII)) { - MachineInstrIndex Index = LIs->getInstructionIndex(MII); + LiveIndex Index = LIs->getInstructionIndex(MII); // We can't insert the spill between the barrier (a call), and its // corresponding call frame setup. @@ -276,9 +276,9 @@ PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI, /// found. MachineBasicBlock::iterator PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI, - MachineInstrIndex LastIdx, + LiveIndex LastIdx, SmallPtrSet<MachineInstr*, 4> &RefsInMBB, - MachineInstrIndex &RestoreIndex) { + LiveIndex &RestoreIndex) { // FIXME: Allow spill to be inserted to the beginning of the mbb. Update mbb // begin index accordingly. MachineBasicBlock::iterator Pt = MBB->end(); @@ -299,10 +299,10 @@ PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI, // FIXME: Limit the number of instructions to examine to reduce // compile time? while (MII != EndPt) { - MachineInstrIndex Index = LIs->getInstructionIndex(MII); + LiveIndex Index = LIs->getInstructionIndex(MII); if (Index > LastIdx) break; - MachineInstrIndex Gap = LIs->findGapBeforeInstr(Index); + LiveIndex Gap = LIs->findGapBeforeInstr(Index); // We can't insert a restore between the barrier (a call) and its // corresponding call frame teardown. @@ -311,7 +311,7 @@ PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI, if (MII == EndPt || RefsInMBB.count(MII)) return Pt; ++MII; } while (MII->getOpcode() != TRI->getCallFrameDestroyOpcode()); - } else if (Gap != MachineInstrIndex()) { + } else if (Gap != LiveIndex()) { Pt = MII; RestoreIndex = Gap; } @@ -344,7 +344,7 @@ int PreAllocSplitting::CreateSpillStackSlot(unsigned Reg, if (CurrSLI->hasAtLeastOneValue()) CurrSValNo = CurrSLI->getValNumInfo(0); else - CurrSValNo = CurrSLI->getNextValue(MachineInstrIndex(), 0, false, + CurrSValNo = CurrSLI->getNextValue(LiveIndex(), 0, false, LSs->getVNInfoAllocator()); return SS; } @@ -353,9 +353,9 @@ int PreAllocSplitting::CreateSpillStackSlot(unsigned Reg, /// slot at the specified index. bool PreAllocSplitting::IsAvailableInStack(MachineBasicBlock *DefMBB, - unsigned Reg, MachineInstrIndex DefIndex, - MachineInstrIndex RestoreIndex, - MachineInstrIndex &SpillIndex, + unsigned Reg, LiveIndex DefIndex, + LiveIndex RestoreIndex, + LiveIndex &SpillIndex, int& SS) const { if (!DefMBB) return false; @@ -363,7 +363,7 @@ PreAllocSplitting::IsAvailableInStack(MachineBasicBlock *DefMBB, DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg); if (I == IntervalSSMap.end()) return false; - DenseMap<MachineInstrIndex, MachineInstrIndex>::iterator + DenseMap<LiveIndex, MachineInstrIndex>::iterator II = Def2SpillMap.find(DefIndex); if (II == Def2SpillMap.end()) return false; @@ -384,8 +384,8 @@ PreAllocSplitting::IsAvailableInStack(MachineBasicBlock *DefMBB, /// interval being split, and the spill and restore indicies, update the live /// interval of the spill stack slot. void -PreAllocSplitting::UpdateSpillSlotInterval(VNInfo *ValNo, MachineInstrIndex SpillIndex, - MachineInstrIndex RestoreIndex) { +PreAllocSplitting::UpdateSpillSlotInterval(VNInfo *ValNo, LiveIndex SpillIndex, + LiveIndex RestoreIndex) { assert(LIs->getMBBFromIndex(RestoreIndex) == BarrierMBB && "Expect restore in the barrier mbb"); @@ -398,7 +398,7 @@ PreAllocSplitting::UpdateSpillSlotInterval(VNInfo *ValNo, MachineInstrIndex Spil } SmallPtrSet<MachineBasicBlock*, 4> Processed; - MachineInstrIndex EndIdx = LIs->getMBBEndIdx(MBB); + LiveIndex EndIdx = LIs->getMBBEndIdx(MBB); LiveRange SLR(SpillIndex, LIs->getNextSlot(EndIdx), CurrSValNo); CurrSLI->addRange(SLR); Processed.insert(MBB); @@ -418,7 +418,7 @@ PreAllocSplitting::UpdateSpillSlotInterval(VNInfo *ValNo, MachineInstrIndex Spil WorkList.pop_back(); if (Processed.count(MBB)) continue; - MachineInstrIndex Idx = LIs->getMBBStartIdx(MBB); + LiveIndex Idx = LIs->getMBBStartIdx(MBB); LR = CurrLI->getLiveRangeContaining(Idx); if (LR && LR->valno == ValNo) { EndIdx = LIs->getMBBEndIdx(MBB); @@ -491,9 +491,9 @@ PreAllocSplitting::PerformPHIConstruction(MachineBasicBlock::iterator UseI, } // Once we've found it, extend its VNInfo to our instruction. - MachineInstrIndex DefIndex = LIs->getInstructionIndex(Walker); + LiveIndex DefIndex = LIs->getInstructionIndex(Walker); DefIndex = LIs->getDefIndex(DefIndex); - MachineInstrIndex EndIndex = LIs->getMBBEndIdx(MBB); + LiveIndex EndIndex = LIs->getMBBEndIdx(MBB); RetVNI = NewVNs[Walker]; LI->addRange(LiveRange(DefIndex, LIs->getNextSlot(EndIndex), RetVNI)); @@ -528,9 +528,9 @@ PreAllocSplitting::PerformPHIConstruction(MachineBasicBlock::iterator UseI, IsTopLevel, IsIntraBlock); } - MachineInstrIndex UseIndex = LIs->getInstructionIndex(Walker); + LiveIndex UseIndex = LIs->getInstructionIndex(Walker); UseIndex = LIs->getUseIndex(UseIndex); - MachineInstrIndex EndIndex; + LiveIndex EndIndex; if (IsIntraBlock) { EndIndex = LIs->getInstructionIndex(UseI); EndIndex = LIs->getUseIndex(EndIndex); @@ -588,10 +588,10 @@ PreAllocSplitting::PerformPHIConstruction(MachineBasicBlock::iterator UseI, IsTopLevel, IsIntraBlock); } - MachineInstrIndex StartIndex = LIs->getInstructionIndex(Walker); + LiveIndex StartIndex = LIs->getInstructionIndex(Walker); StartIndex = foundDef ? LIs->getDefIndex(StartIndex) : LIs->getUseIndex(StartIndex); - MachineInstrIndex EndIndex; + LiveIndex EndIndex; if (IsIntraBlock) { EndIndex = LIs->getInstructionIndex(UseI); EndIndex = LIs->getUseIndex(EndIndex); @@ -640,9 +640,9 @@ PreAllocSplitting::PerformPHIConstructionFallBack(MachineBasicBlock::iterator Us // assume that we are not intrablock here. if (Phis.count(MBB)) return Phis[MBB]; - MachineInstrIndex StartIndex = LIs->getMBBStartIdx(MBB); + LiveIndex StartIndex = LIs->getMBBStartIdx(MBB); VNInfo *RetVNI = Phis[MBB] = - LI->getNextValue(MachineInstrIndex(), /*FIXME*/ 0, false, + LI->getNextValue(LiveIndex(), /*FIXME*/ 0, false, LIs->getVNInfoAllocator()); if (!IsIntraBlock) LiveOut[MBB] = RetVNI; @@ -685,13 +685,13 @@ PreAllocSplitting::PerformPHIConstructionFallBack(MachineBasicBlock::iterator Us for (DenseMap<MachineBasicBlock*, VNInfo*>::iterator I = IncomingVNs.begin(), E = IncomingVNs.end(); I != E; ++I) { I->second->setHasPHIKill(true); - MachineInstrIndex KillIndex = LIs->getMBBEndIdx(I->first); + LiveIndex KillIndex = LIs->getMBBEndIdx(I->first); if (!I->second->isKill(KillIndex)) I->second->addKill(KillIndex); } } - MachineInstrIndex EndIndex; + LiveIndex EndIndex; if (IsIntraBlock) { EndIndex = LIs->getInstructionIndex(UseI); EndIndex = LIs->getUseIndex(EndIndex); @@ -733,7 +733,7 @@ void PreAllocSplitting::ReconstructLiveInterval(LiveInterval* LI) { DE = MRI->def_end(); DI != DE; ++DI) { Defs[(*DI).getParent()].insert(&*DI); - MachineInstrIndex DefIdx = LIs->getInstructionIndex(&*DI); + LiveIndex DefIdx = LIs->getInstructionIndex(&*DI); DefIdx = LIs->getDefIndex(DefIdx); assert(DI->getOpcode() != TargetInstrInfo::PHI && @@ -769,7 +769,7 @@ void PreAllocSplitting::ReconstructLiveInterval(LiveInterval* LI) { // Add ranges for dead defs for (MachineRegisterInfo::def_iterator DI = MRI->def_begin(LI->reg), DE = MRI->def_end(); DI != DE; ++DI) { - MachineInstrIndex DefIdx = LIs->getInstructionIndex(&*DI); + LiveIndex DefIdx = LIs->getInstructionIndex(&*DI); DefIdx = LIs->getDefIndex(DefIdx); if (LI->liveAt(DefIdx)) continue; @@ -847,7 +847,7 @@ void PreAllocSplitting::RenumberValno(VNInfo* VN) { for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg), E = MRI->reg_end(); I != E; ++I) { MachineOperand& MO = I.getOperand(); - MachineInstrIndex InstrIdx = LIs->getInstructionIndex(&*I); + LiveIndex InstrIdx = LIs->getInstructionIndex(&*I); if ((MO.isUse() && NewLI.liveAt(LIs->getUseIndex(InstrIdx))) || (MO.isDef() && NewLI.liveAt(LIs->getDefIndex(InstrIdx)))) @@ -875,12 +875,12 @@ void PreAllocSplitting::RenumberValno(VNInfo* VN) { bool PreAllocSplitting::Rematerialize(unsigned VReg, VNInfo* ValNo, MachineInstr* DefMI, MachineBasicBlock::iterator RestorePt, - MachineInstrIndex RestoreIdx, + LiveIndex RestoreIdx, SmallPtrSet<MachineInstr*, 4>& RefsInMBB) { MachineBasicBlock& MBB = *RestorePt->getParent(); MachineBasicBlock::iterator KillPt = BarrierMBB->end(); - MachineInstrIndex KillIdx; + LiveIndex KillIdx; if (!ValNo->isDefAccurate() || DefMI->getParent() == BarrierMBB) KillPt = findSpillPoint(BarrierMBB, Barrier, NULL, RefsInMBB, KillIdx); else @@ -893,7 +893,7 @@ bool PreAllocSplitting::Rematerialize(unsigned VReg, VNInfo* ValNo, LIs->InsertMachineInstrInMaps(prior(RestorePt), RestoreIdx); ReconstructLiveInterval(CurrLI); - MachineInstrIndex RematIdx = LIs->getInstructionIndex(prior(RestorePt)); + LiveIndex RematIdx = LIs->getInstructionIndex(prior(RestorePt)); RematIdx = LIs->getDefIndex(RematIdx); RenumberValno(CurrLI->findDefinedVNInfoForRegInt(RematIdx)); @@ -950,7 +950,7 @@ MachineInstr* PreAllocSplitting::FoldSpill(unsigned vreg, if (CurrSLI->hasAtLeastOneValue()) CurrSValNo = CurrSLI->getValNumInfo(0); else - CurrSValNo = CurrSLI->getNextValue(MachineInstrIndex(), 0, false, + CurrSValNo = CurrSLI->getNextValue(LiveIndex(), 0, false, LSs->getVNInfoAllocator()); } @@ -1060,7 +1060,7 @@ bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) { } // Find a point to restore the value after the barrier. - MachineInstrIndex RestoreIndex; + LiveIndex RestoreIndex; MachineBasicBlock::iterator RestorePt = findRestorePoint(BarrierMBB, Barrier, LR->end, RefsInMBB, RestoreIndex); if (RestorePt == BarrierMBB->end()) @@ -1074,7 +1074,7 @@ bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) { // Add a spill either before the barrier or after the definition. MachineBasicBlock *DefMBB = DefMI ? DefMI->getParent() : NULL; const TargetRegisterClass *RC = MRI->getRegClass(CurrLI->reg); - MachineInstrIndex SpillIndex; + LiveIndex SpillIndex; MachineInstr *SpillMI = NULL; int SS = -1; if (!ValNo->isDefAccurate()) { @@ -1152,7 +1152,7 @@ bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) { ReconstructLiveInterval(CurrLI); if (!FoldedRestore) { - MachineInstrIndex RestoreIdx = LIs->getInstructionIndex(prior(RestorePt)); + LiveIndex RestoreIdx = LIs->getInstructionIndex(prior(RestorePt)); RestoreIdx = LIs->getDefIndex(RestoreIdx); RenumberValno(CurrLI->findDefinedVNInfoForRegInt(RestoreIdx)); } @@ -1240,7 +1240,7 @@ bool PreAllocSplitting::removeDeadSpills(SmallPtrSet<LiveInterval*, 8>& split) { // reaching definition (VNInfo). for (MachineRegisterInfo::use_iterator UI = MRI->use_begin((*LI)->reg), UE = MRI->use_end(); UI != UE; ++UI) { - MachineInstrIndex index = LIs->getInstructionIndex(&*UI); + LiveIndex index = LIs->getInstructionIndex(&*UI); index = LIs->getUseIndex(index); const LiveRange* LR = (*LI)->getLiveRangeContaining(index); @@ -1390,7 +1390,7 @@ bool PreAllocSplitting::createsNewJoin(LiveRange* LR, if (LR->valno->hasPHIKill()) return false; - MachineInstrIndex MBBEnd = LIs->getMBBEndIdx(BarrierMBB); + LiveIndex MBBEnd = LIs->getMBBEndIdx(BarrierMBB); if (LR->end < MBBEnd) return false; diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 9d22e13..5d58ea9 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -176,11 +176,11 @@ namespace { /// processActiveIntervals - expire old intervals and move non-overlapping /// ones to the inactive list. - void processActiveIntervals(MachineInstrIndex CurPoint); + void processActiveIntervals(LiveIndex CurPoint); /// processInactiveIntervals - expire old intervals and move overlapping /// ones to the active list. - void processInactiveIntervals(MachineInstrIndex CurPoint); + void processInactiveIntervals(LiveIndex CurPoint); /// hasNextReloadInterval - Return the next liveinterval that's being /// defined by a reload from the same SS as the specified one. @@ -366,7 +366,7 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) { return Reg; VNInfo *vni = cur.begin()->valno; - if ((vni->def == MachineInstrIndex()) || + if ((vni->def == LiveIndex()) || vni->isUnused() || !vni->isDefAccurate()) return Reg; MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def); @@ -586,7 +586,7 @@ void RALinScan::linearScan() { /// processActiveIntervals - expire old intervals and move non-overlapping ones /// to the inactive list. -void RALinScan::processActiveIntervals(MachineInstrIndex CurPoint) +void RALinScan::processActiveIntervals(LiveIndex CurPoint) { DEBUG(errs() << "\tprocessing active intervals:\n"); @@ -632,7 +632,7 @@ void RALinScan::processActiveIntervals(MachineInstrIndex CurPoint) /// processInactiveIntervals - expire old intervals and move overlapping /// ones to the active list. -void RALinScan::processInactiveIntervals(MachineInstrIndex CurPoint) +void RALinScan::processInactiveIntervals(LiveIndex CurPoint) { DEBUG(errs() << "\tprocessing inactive intervals:\n"); @@ -713,7 +713,7 @@ FindIntervalInVector(RALinScan::IntervalPtrs &IP, LiveInterval *LI) { return IP.end(); } -static void RevertVectorIteratorsTo(RALinScan::IntervalPtrs &V, MachineInstrIndex Point){ +static void RevertVectorIteratorsTo(RALinScan::IntervalPtrs &V, LiveIndex Point){ for (unsigned i = 0, e = V.size(); i != e; ++i) { RALinScan::IntervalPtr &IP = V[i]; LiveInterval::iterator I = std::upper_bound(IP.first->begin(), @@ -739,7 +739,7 @@ static void addStackInterval(LiveInterval *cur, LiveStacks *ls_, if (SI.hasAtLeastOneValue()) VNI = SI.getValNumInfo(0); else - VNI = SI.getNextValue(MachineInstrIndex(), 0, false, + VNI = SI.getNextValue(LiveIndex(), 0, false, ls_->getVNInfoAllocator()); LiveInterval &RI = li_->getInterval(cur->reg); @@ -907,7 +907,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { backUpRegUses(); std::vector<std::pair<unsigned, float> > SpillWeightsToAdd; - MachineInstrIndex StartPosition = cur->beginIndex(); + LiveIndex StartPosition = cur->beginIndex(); const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC); // If start of this live interval is defined by a move instruction and its @@ -917,7 +917,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { // one, e.g. X86::mov32to32_. These move instructions are not coalescable. if (!vrm_->getRegAllocPref(cur->reg) && cur->hasAtLeastOneValue()) { VNInfo *vni = cur->begin()->valno; - if ((vni->def != MachineInstrIndex()) && !vni->isUnused() && + if ((vni->def != LiveIndex()) && !vni->isUnused() && vni->isDefAccurate()) { MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def); unsigned SrcReg, DstReg, SrcSubReg, DstSubReg; @@ -1173,7 +1173,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { LiveInterval *ReloadLi = added[i]; if (ReloadLi->weight == HUGE_VALF && li_->getApproximateInstructionCount(*ReloadLi) == 0) { - MachineInstrIndex ReloadIdx = ReloadLi->beginIndex(); + LiveIndex ReloadIdx = ReloadLi->beginIndex(); MachineBasicBlock *ReloadMBB = li_->getMBBFromIndex(ReloadIdx); int ReloadSS = vrm_->getStackSlot(ReloadLi->reg); if (LastReloadMBB == ReloadMBB && LastReloadSS == ReloadSS) { @@ -1243,7 +1243,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { spilled.insert(sli->reg); } - MachineInstrIndex earliestStart = earliestStartInterval->beginIndex(); + LiveIndex earliestStart = earliestStartInterval->beginIndex(); DEBUG(errs() << "\t\trolling back to: " << earliestStart << '\n'); @@ -1324,7 +1324,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { LiveInterval *ReloadLi = added[i]; if (ReloadLi->weight == HUGE_VALF && li_->getApproximateInstructionCount(*ReloadLi) == 0) { - MachineInstrIndex ReloadIdx = ReloadLi->beginIndex(); + LiveIndex ReloadIdx = ReloadLi->beginIndex(); MachineBasicBlock *ReloadMBB = li_->getMBBFromIndex(ReloadIdx); int ReloadSS = vrm_->getStackSlot(ReloadLi->reg); if (LastReloadMBB == ReloadMBB && LastReloadSS == ReloadSS) { diff --git a/lib/CodeGen/RegAllocPBQP.cpp b/lib/CodeGen/RegAllocPBQP.cpp index 33d82d0..bee5d93 100644 --- a/lib/CodeGen/RegAllocPBQP.cpp +++ b/lib/CodeGen/RegAllocPBQP.cpp @@ -684,7 +684,7 @@ void PBQPRegAlloc::addStackInterval(const LiveInterval *spilled, vni = stackInterval.getValNumInfo(0); else vni = stackInterval.getNextValue( - MachineInstrIndex(), 0, false, lss->getVNInfoAllocator()); + LiveIndex(), 0, false, lss->getVNInfoAllocator()); LiveInterval &rhsInterval = lis->getInterval(spilled->reg); stackInterval.MergeRangesInAsValue(rhsInterval, vni); diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index ac70893..2884a78 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -103,7 +103,7 @@ void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const { bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB, MachineInstr *CopyMI) { - MachineInstrIndex CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI)); + LiveIndex CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI)); // BValNo is a value number in B that is defined by a copy from A. 'B3' in // the example above. @@ -118,7 +118,7 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, assert(BValNo->def == CopyIdx && "Copy doesn't define the value?"); // AValNo is the value number in A that defines the copy, A3 in the example. - MachineInstrIndex CopyUseIdx = li_->getUseIndex(CopyIdx); + LiveIndex CopyUseIdx = li_->getUseIndex(CopyIdx); LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyUseIdx); assert(ALR != IntA.end() && "Live range not found!"); VNInfo *AValNo = ALR->valno; @@ -191,7 +191,7 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, IntB.print(errs(), tri_); }); - MachineInstrIndex FillerStart = ValLR->end, FillerEnd = BLR->start; + LiveIndex FillerStart = ValLR->end, FillerEnd = BLR->start; // We are about to delete CopyMI, so need to remove it as the 'instruction // that defines this value #'. Update the the valnum with the new defining // instruction #. @@ -304,7 +304,7 @@ TransferImplicitOps(MachineInstr *MI, MachineInstr *NewMI) { bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, LiveInterval &IntB, MachineInstr *CopyMI) { - MachineInstrIndex CopyIdx = + LiveIndex CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI)); // FIXME: For now, only eliminate the copy by commuting its def when the @@ -374,7 +374,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(IntA.reg), UE = mri_->use_end(); UI != UE; ++UI) { MachineInstr *UseMI = &*UI; - MachineInstrIndex UseIdx = li_->getInstructionIndex(UseMI); + LiveIndex UseIdx = li_->getInstructionIndex(UseMI); LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx); if (ULR == IntA.end()) continue; @@ -399,7 +399,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, bool BHasPHIKill = BValNo->hasPHIKill(); SmallVector<VNInfo*, 4> BDeadValNos; VNInfo::KillSet BKills; - std::map<MachineInstrIndex, MachineInstrIndex> BExtend; + std::map<LiveIndex, MachineInstrIndex> BExtend; // If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g. // A = or A, B @@ -426,7 +426,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, ++UI; if (JoinedCopies.count(UseMI)) continue; - MachineInstrIndex UseIdx= li_->getUseIndex(li_->getInstructionIndex(UseMI)); + LiveIndex UseIdx= li_->getUseIndex(li_->getInstructionIndex(UseMI)); LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx); if (ULR == IntA.end() || ULR->valno != AValNo) continue; @@ -446,7 +446,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, // This copy will become a noop. If it's defining a new val#, // remove that val# as well. However this live range is being // extended to the end of the existing live range defined by the copy. - MachineInstrIndex DefIdx = li_->getDefIndex(UseIdx); + LiveIndex DefIdx = li_->getDefIndex(UseIdx); const LiveRange *DLR = IntB.getLiveRangeContaining(DefIdx); BHasPHIKill |= DLR->valno->hasPHIKill(); assert(DLR->valno->def == DefIdx); @@ -493,8 +493,8 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end(); AI != AE; ++AI) { if (AI->valno != AValNo) continue; - MachineInstrIndex End = AI->end; - std::map<MachineInstrIndex, MachineInstrIndex>::iterator + LiveIndex End = AI->end; + std::map<LiveIndex, MachineInstrIndex>::iterator EI = BExtend.find(End); if (EI != BExtend.end()) End = EI->second; @@ -549,7 +549,7 @@ static bool isSameOrFallThroughBB(MachineBasicBlock *MBB, /// from a physical register live interval as well as from the live intervals /// of its sub-registers. static void removeRange(LiveInterval &li, - MachineInstrIndex Start, MachineInstrIndex End, + LiveIndex Start, MachineInstrIndex End, LiveIntervals *li_, const TargetRegisterInfo *tri_) { li.removeRange(Start, End, true); if (TargetRegisterInfo::isPhysicalRegister(li.reg)) { @@ -557,8 +557,8 @@ static void removeRange(LiveInterval &li, if (!li_->hasInterval(*SR)) continue; LiveInterval &sli = li_->getInterval(*SR); - MachineInstrIndex RemoveStart = Start; - MachineInstrIndex RemoveEnd = Start; + LiveIndex RemoveStart = Start; + LiveIndex RemoveEnd = Start; while (RemoveEnd != End) { LiveInterval::iterator LR = sli.FindLiveRangeContaining(RemoveStart); if (LR == sli.end()) @@ -575,12 +575,12 @@ static void removeRange(LiveInterval &li, /// as the copy instruction, trim the live interval to the last use and return /// true. bool -SimpleRegisterCoalescing::TrimLiveIntervalToLastUse(MachineInstrIndex CopyIdx, +SimpleRegisterCoalescing::TrimLiveIntervalToLastUse(LiveIndex CopyIdx, MachineBasicBlock *CopyMBB, LiveInterval &li, const LiveRange *LR) { - MachineInstrIndex MBBStart = li_->getMBBStartIdx(CopyMBB); - MachineInstrIndex LastUseIdx; + LiveIndex MBBStart = li_->getMBBStartIdx(CopyMBB); + LiveIndex LastUseIdx; MachineOperand *LastUse = lastRegisterUse(LR->start, li_->getPrevSlot(CopyIdx), li.reg, LastUseIdx); if (LastUse) { @@ -615,7 +615,7 @@ SimpleRegisterCoalescing::TrimLiveIntervalToLastUse(MachineInstrIndex CopyIdx, // Is it livein? if (LR->start <= MBBStart && LR->end > MBBStart) { - if (LR->start == MachineInstrIndex()) { + if (LR->start == LiveIndex()) { assert(TargetRegisterInfo::isPhysicalRegister(li.reg)); // Live-in to the function but dead. Remove it from entry live-in set. mf_->begin()->removeLiveIn(li.reg); @@ -632,7 +632,7 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg, unsigned DstSubIdx, MachineInstr *CopyMI) { - MachineInstrIndex CopyIdx = li_->getUseIndex(li_->getInstructionIndex(CopyMI)); + LiveIndex CopyIdx = li_->getUseIndex(li_->getInstructionIndex(CopyMI)); LiveInterval::iterator SrcLR = SrcInt.FindLiveRangeContaining(CopyIdx); assert(SrcLR != SrcInt.end() && "Live range not found!"); VNInfo *ValNo = SrcLR->valno; @@ -682,7 +682,7 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, return false; } - MachineInstrIndex DefIdx = li_->getDefIndex(CopyIdx); + LiveIndex DefIdx = li_->getDefIndex(CopyIdx); const LiveRange *DLR= li_->getInterval(DstReg).getLiveRangeContaining(DefIdx); DLR->valno->setCopy(0); // Don't forget to update sub-register intervals. @@ -814,7 +814,7 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, (TargetRegisterInfo::isVirtualRegister(CopyDstReg) || allocatableRegs_[CopyDstReg])) { LiveInterval &LI = li_->getInterval(CopyDstReg); - MachineInstrIndex DefIdx = + LiveIndex DefIdx = li_->getDefIndex(li_->getInstructionIndex(UseMI)); if (const LiveRange *DLR = LI.getLiveRangeContaining(DefIdx)) { if (DLR->valno->def == DefIdx) @@ -834,7 +834,7 @@ void SimpleRegisterCoalescing::RemoveUnnecessaryKills(unsigned Reg, if (!UseMO.isKill()) continue; MachineInstr *UseMI = UseMO.getParent(); - MachineInstrIndex UseIdx = + LiveIndex UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); const LiveRange *LR = LI.getLiveRangeContaining(UseIdx); if (!LR || @@ -880,14 +880,14 @@ static bool removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *li_, /// Return true if live interval is removed. bool SimpleRegisterCoalescing::ShortenDeadCopyLiveRange(LiveInterval &li, MachineInstr *CopyMI) { - MachineInstrIndex CopyIdx = li_->getInstructionIndex(CopyMI); + LiveIndex CopyIdx = li_->getInstructionIndex(CopyMI); LiveInterval::iterator MLR = li.FindLiveRangeContaining(li_->getDefIndex(CopyIdx)); if (MLR == li.end()) return false; // Already removed by ShortenDeadCopySrcLiveRange. - MachineInstrIndex RemoveStart = MLR->start; - MachineInstrIndex RemoveEnd = MLR->end; - MachineInstrIndex DefIdx = li_->getDefIndex(CopyIdx); + LiveIndex RemoveStart = MLR->start; + LiveIndex RemoveEnd = MLR->end; + LiveIndex DefIdx = li_->getDefIndex(CopyIdx); // Remove the liverange that's defined by this. if (RemoveStart == DefIdx && RemoveEnd == li_->getNextSlot(DefIdx)) { removeRange(li, RemoveStart, RemoveEnd, li_, tri_); @@ -900,7 +900,7 @@ bool SimpleRegisterCoalescing::ShortenDeadCopyLiveRange(LiveInterval &li, /// the val# it defines. If the live interval becomes empty, remove it as well. bool SimpleRegisterCoalescing::RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI) { - MachineInstrIndex DefIdx = li_->getDefIndex(li_->getInstructionIndex(DefMI)); + LiveIndex DefIdx = li_->getDefIndex(li_->getInstructionIndex(DefMI)); LiveInterval::iterator MLR = li.FindLiveRangeContaining(DefIdx); if (DefIdx != MLR->valno->def) return false; @@ -911,7 +911,7 @@ bool SimpleRegisterCoalescing::RemoveDeadDef(LiveInterval &li, /// PropagateDeadness - Propagate the dead marker to the instruction which /// defines the val#. static void PropagateDeadness(LiveInterval &li, MachineInstr *CopyMI, - MachineInstrIndex &LRStart, LiveIntervals *li_, + LiveIndex &LRStart, LiveIntervals *li_, const TargetRegisterInfo* tri_) { MachineInstr *DefMI = li_->getInstructionFromIndex(li_->getDefIndex(LRStart)); @@ -933,8 +933,8 @@ static void PropagateDeadness(LiveInterval &li, MachineInstr *CopyMI, bool SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li, MachineInstr *CopyMI) { - MachineInstrIndex CopyIdx = li_->getInstructionIndex(CopyMI); - if (CopyIdx == MachineInstrIndex()) { + LiveIndex CopyIdx = li_->getInstructionIndex(CopyMI); + if (CopyIdx == LiveIndex()) { // FIXME: special case: function live in. It can be a general case if the // first instruction index starts at > 0 value. assert(TargetRegisterInfo::isPhysicalRegister(li.reg)); @@ -952,8 +952,8 @@ SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li, // Livein but defined by a phi. return false; - MachineInstrIndex RemoveStart = LR->start; - MachineInstrIndex RemoveEnd = li_->getNextSlot(li_->getDefIndex(CopyIdx)); + LiveIndex RemoveStart = LR->start; + LiveIndex RemoveEnd = li_->getNextSlot(li_->getDefIndex(CopyIdx)); if (LR->end > RemoveEnd) // More uses past this copy? Nothing to do. return false; @@ -1029,7 +1029,7 @@ SimpleRegisterCoalescing::isWinToJoinVRWithSrcPhysReg(MachineInstr *CopyMI, // If the virtual register live interval extends into a loop, turn down // aggressiveness. - MachineInstrIndex CopyIdx = + LiveIndex CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI)); const MachineLoop *L = loopInfo->getLoopFor(CopyMBB); if (!L) { @@ -1046,7 +1046,7 @@ SimpleRegisterCoalescing::isWinToJoinVRWithSrcPhysReg(MachineInstr *CopyMI, if (!L || Length <= Threshold) return true; - MachineInstrIndex UseIdx = li_->getUseIndex(CopyIdx); + LiveIndex UseIdx = li_->getUseIndex(CopyIdx); LiveInterval::iterator SLR = SrcInt.FindLiveRangeContaining(UseIdx); MachineBasicBlock *SMBB = li_->getMBBFromIndex(SLR->start); if (loopInfo->getLoopFor(SMBB) != L) { @@ -1090,9 +1090,9 @@ SimpleRegisterCoalescing::isWinToJoinVRWithDstPhysReg(MachineInstr *CopyMI, // If the virtual register live interval is defined or cross a loop, turn // down aggressiveness. - MachineInstrIndex CopyIdx = + LiveIndex CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI)); - MachineInstrIndex UseIdx = li_->getUseIndex(CopyIdx); + LiveIndex UseIdx = li_->getUseIndex(CopyIdx); LiveInterval::iterator SLR = SrcInt.FindLiveRangeContaining(UseIdx); assert(SLR != SrcInt.end() && "Live range not found!"); SLR = SrcInt.FindLiveRangeContaining(li_->getPrevSlot(SLR->start)); @@ -2476,11 +2476,11 @@ SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA, /// lastRegisterUse - Returns the last use of the specific register between /// cycles Start and End or NULL if there are no uses. MachineOperand * -SimpleRegisterCoalescing::lastRegisterUse(MachineInstrIndex Start, - MachineInstrIndex End, +SimpleRegisterCoalescing::lastRegisterUse(LiveIndex Start, + LiveIndex End, unsigned Reg, - MachineInstrIndex &UseIdx) const{ - UseIdx = MachineInstrIndex(); + LiveIndex &UseIdx) const{ + UseIdx = LiveIndex(); if (TargetRegisterInfo::isVirtualRegister(Reg)) { MachineOperand *LastUse = NULL; for (MachineRegisterInfo::use_iterator I = mri_->use_begin(Reg), @@ -2492,7 +2492,7 @@ SimpleRegisterCoalescing::lastRegisterUse(MachineInstrIndex Start, SrcReg == DstReg) // Ignore identity copies. continue; - MachineInstrIndex Idx = li_->getInstructionIndex(UseMI); + LiveIndex Idx = li_->getInstructionIndex(UseMI); if (Idx >= Start && Idx < End && Idx >= UseIdx) { LastUse = &Use; UseIdx = li_->getUseIndex(Idx); @@ -2501,12 +2501,12 @@ SimpleRegisterCoalescing::lastRegisterUse(MachineInstrIndex Start, return LastUse; } - MachineInstrIndex s = Start; - MachineInstrIndex e = li_->getBaseIndex(li_->getPrevSlot(End)); + LiveIndex s = Start; + LiveIndex e = li_->getBaseIndex(li_->getPrevSlot(End)); while (e >= s) { // Skip deleted instructions MachineInstr *MI = li_->getInstructionFromIndex(e); - while (e != MachineInstrIndex() && li_->getPrevIndex(e) >= s && !MI) { + while (e != LiveIndex() && li_->getPrevIndex(e) >= s && !MI) { e = li_->getPrevIndex(e); MI = li_->getInstructionFromIndex(e); } @@ -2560,7 +2560,7 @@ void SimpleRegisterCoalescing::CalculateSpillWeights() { for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); mbbi != mbbe; ++mbbi) { MachineBasicBlock* MBB = mbbi; - MachineInstrIndex MBBEnd = li_->getMBBEndIdx(MBB); + LiveIndex MBBEnd = li_->getMBBEndIdx(MBB); MachineLoop* loop = loopInfo->getLoopFor(MBB); unsigned loopDepth = loop ? loop->getLoopDepth() : 0; bool isExit = loop ? loop->isLoopExit(MBB) : false; @@ -2597,7 +2597,7 @@ void SimpleRegisterCoalescing::CalculateSpillWeights() { float Weight = li_->getSpillWeight(HasDef, HasUse, loopDepth); if (HasDef && isExit) { // Looks like this is a loop count variable update. - MachineInstrIndex DefIdx = + LiveIndex DefIdx = li_->getDefIndex(li_->getInstructionIndex(MI)); const LiveRange *DLR = li_->getInterval(Reg).getLiveRangeContaining(DefIdx); diff --git a/lib/CodeGen/SimpleRegisterCoalescing.h b/lib/CodeGen/SimpleRegisterCoalescing.h index 20b8eb2..1d59a23 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.h +++ b/lib/CodeGen/SimpleRegisterCoalescing.h @@ -145,7 +145,7 @@ namespace llvm { /// TrimLiveIntervalToLastUse - If there is a last use in the same basic /// block as the copy instruction, trim the ive interval to the last use /// and return true. - bool TrimLiveIntervalToLastUse(MachineInstrIndex CopyIdx, + bool TrimLiveIntervalToLastUse(LiveIndex CopyIdx, MachineBasicBlock *CopyMBB, LiveInterval &li, const LiveRange *LR); @@ -234,9 +234,9 @@ namespace llvm { /// lastRegisterUse - Returns the last use of the specific register between /// cycles Start and End or NULL if there are no uses. - MachineOperand *lastRegisterUse(MachineInstrIndex Start, - MachineInstrIndex End, unsigned Reg, - MachineInstrIndex &LastUseIdx) const; + MachineOperand *lastRegisterUse(LiveIndex Start, + LiveIndex End, unsigned Reg, + LiveIndex &LastUseIdx) const; /// CalculateSpillWeights - Compute spill weights for all virtual register /// live intervals. diff --git a/lib/CodeGen/Spiller.cpp b/lib/CodeGen/Spiller.cpp index 4326a89..7e6f187 100644 --- a/lib/CodeGen/Spiller.cpp +++ b/lib/CodeGen/Spiller.cpp @@ -51,13 +51,13 @@ protected: /// Ensures there is space before the given machine instruction, returns the /// instruction's new number. - MachineInstrIndex makeSpaceBefore(MachineInstr *mi) { + LiveIndex makeSpaceBefore(MachineInstr *mi) { if (!lis->hasGapBeforeInstr(lis->getInstructionIndex(mi))) { lis->scaleNumbering(2); ls->scaleNumbering(2); } - MachineInstrIndex miIdx = lis->getInstructionIndex(mi); + LiveIndex miIdx = lis->getInstructionIndex(mi); assert(lis->hasGapBeforeInstr(miIdx)); @@ -66,13 +66,13 @@ protected: /// Ensure there is space after the given machine instruction, returns the /// instruction's new number. - MachineInstrIndex makeSpaceAfter(MachineInstr *mi) { + LiveIndex makeSpaceAfter(MachineInstr *mi) { if (!lis->hasGapAfterInstr(lis->getInstructionIndex(mi))) { lis->scaleNumbering(2); ls->scaleNumbering(2); } - MachineInstrIndex miIdx = lis->getInstructionIndex(mi); + LiveIndex miIdx = lis->getInstructionIndex(mi); assert(lis->hasGapAfterInstr(miIdx)); @@ -83,19 +83,19 @@ protected: /// after the given instruction. Returns the base index of the inserted /// instruction. The caller is responsible for adding an appropriate /// LiveInterval to the LiveIntervals analysis. - MachineInstrIndex insertStoreAfter(MachineInstr *mi, unsigned ss, + LiveIndex insertStoreAfter(MachineInstr *mi, unsigned ss, unsigned vreg, const TargetRegisterClass *trc) { MachineBasicBlock::iterator nextInstItr(next(mi)); - MachineInstrIndex miIdx = makeSpaceAfter(mi); + LiveIndex miIdx = makeSpaceAfter(mi); tii->storeRegToStackSlot(*mi->getParent(), nextInstItr, vreg, true, ss, trc); MachineBasicBlock::iterator storeInstItr(next(mi)); MachineInstr *storeInst = &*storeInstItr; - MachineInstrIndex storeInstIdx = lis->getNextIndex(miIdx); + LiveIndex storeInstIdx = lis->getNextIndex(miIdx); assert(lis->getInstructionFromIndex(storeInstIdx) == 0 && "Store inst index already in use."); @@ -108,15 +108,15 @@ protected: /// Insert a store of the given vreg to the given stack slot immediately /// before the given instructnion. Returns the base index of the inserted /// Instruction. - MachineInstrIndex insertStoreBefore(MachineInstr *mi, unsigned ss, + LiveIndex insertStoreBefore(MachineInstr *mi, unsigned ss, unsigned vreg, const TargetRegisterClass *trc) { - MachineInstrIndex miIdx = makeSpaceBefore(mi); + LiveIndex miIdx = makeSpaceBefore(mi); tii->storeRegToStackSlot(*mi->getParent(), mi, vreg, true, ss, trc); MachineBasicBlock::iterator storeInstItr(prior(mi)); MachineInstr *storeInst = &*storeInstItr; - MachineInstrIndex storeInstIdx = lis->getPrevIndex(miIdx); + LiveIndex storeInstIdx = lis->getPrevIndex(miIdx); assert(lis->getInstructionFromIndex(storeInstIdx) == 0 && "Store inst index already in use."); @@ -131,8 +131,8 @@ protected: unsigned vreg, const TargetRegisterClass *trc) { - MachineInstrIndex storeInstIdx = insertStoreAfter(mi, ss, vreg, trc); - MachineInstrIndex start = lis->getDefIndex(lis->getInstructionIndex(mi)), + LiveIndex storeInstIdx = insertStoreAfter(mi, ss, vreg, trc); + LiveIndex start = lis->getDefIndex(lis->getInstructionIndex(mi)), end = lis->getUseIndex(storeInstIdx); VNInfo *vni = @@ -149,18 +149,18 @@ protected: /// after the given instruction. Returns the base index of the inserted /// instruction. The caller is responsibel for adding/removing an appropriate /// range vreg's LiveInterval. - MachineInstrIndex insertLoadAfter(MachineInstr *mi, unsigned ss, + LiveIndex insertLoadAfter(MachineInstr *mi, unsigned ss, unsigned vreg, const TargetRegisterClass *trc) { MachineBasicBlock::iterator nextInstItr(next(mi)); - MachineInstrIndex miIdx = makeSpaceAfter(mi); + LiveIndex miIdx = makeSpaceAfter(mi); tii->loadRegFromStackSlot(*mi->getParent(), nextInstItr, vreg, ss, trc); MachineBasicBlock::iterator loadInstItr(next(mi)); MachineInstr *loadInst = &*loadInstItr; - MachineInstrIndex loadInstIdx = lis->getNextIndex(miIdx); + LiveIndex loadInstIdx = lis->getNextIndex(miIdx); assert(lis->getInstructionFromIndex(loadInstIdx) == 0 && "Store inst index already in use."); @@ -174,15 +174,15 @@ protected: /// before the given instruction. Returns the base index of the inserted /// instruction. The caller is responsible for adding an appropriate /// LiveInterval to the LiveIntervals analysis. - MachineInstrIndex insertLoadBefore(MachineInstr *mi, unsigned ss, + LiveIndex insertLoadBefore(MachineInstr *mi, unsigned ss, unsigned vreg, const TargetRegisterClass *trc) { - MachineInstrIndex miIdx = makeSpaceBefore(mi); + LiveIndex miIdx = makeSpaceBefore(mi); tii->loadRegFromStackSlot(*mi->getParent(), mi, vreg, ss, trc); MachineBasicBlock::iterator loadInstItr(prior(mi)); MachineInstr *loadInst = &*loadInstItr; - MachineInstrIndex loadInstIdx = lis->getPrevIndex(miIdx); + LiveIndex loadInstIdx = lis->getPrevIndex(miIdx); assert(lis->getInstructionFromIndex(loadInstIdx) == 0 && "Load inst index already in use."); @@ -197,8 +197,8 @@ protected: unsigned vreg, const TargetRegisterClass *trc) { - MachineInstrIndex loadInstIdx = insertLoadBefore(mi, ss, vreg, trc); - MachineInstrIndex start = lis->getDefIndex(loadInstIdx), + LiveIndex loadInstIdx = insertLoadBefore(mi, ss, vreg, trc); + LiveIndex start = lis->getDefIndex(loadInstIdx), end = lis->getUseIndex(lis->getInstructionIndex(mi)); VNInfo *vni = @@ -321,7 +321,7 @@ public: vrm->assignVirt2StackSlot(li->reg, ss); MachineInstr *mi = 0; - MachineInstrIndex storeIdx = MachineInstrIndex(); + LiveIndex storeIdx = MachineInstrIndex(); if (valno->isDefAccurate()) { // If we have an accurate def we can just grab an iterator to the instr @@ -335,7 +335,7 @@ public: } MachineBasicBlock *defBlock = mi->getParent(); - MachineInstrIndex loadIdx = MachineInstrIndex(); + LiveIndex loadIdx = MachineInstrIndex(); // Now we need to find the load... MachineBasicBlock::iterator useItr(mi); diff --git a/lib/CodeGen/StrongPHIElimination.cpp b/lib/CodeGen/StrongPHIElimination.cpp index d2f93fc..6010a90 100644 --- a/lib/CodeGen/StrongPHIElimination.cpp +++ b/lib/CodeGen/StrongPHIElimination.cpp @@ -295,7 +295,7 @@ StrongPHIElimination::computeDomForest( static bool isLiveIn(unsigned r, MachineBasicBlock* MBB, LiveIntervals& LI) { LiveInterval& I = LI.getOrCreateInterval(r); - MachineInstrIndex idx = LI.getMBBStartIdx(MBB); + LiveIndex idx = LI.getMBBStartIdx(MBB); return I.liveAt(idx); } @@ -428,7 +428,7 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) { } LiveInterval& PI = LI.getOrCreateInterval(DestReg); - MachineInstrIndex pIdx = LI.getDefIndex(LI.getInstructionIndex(P)); + LiveIndex pIdx = LI.getDefIndex(LI.getInstructionIndex(P)); VNInfo* PVN = PI.getLiveRangeContaining(pIdx)->valno; PhiValueNumber.insert(std::make_pair(DestReg, PVN->id)); @@ -748,7 +748,7 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB, LiveInterval& I = LI.getInterval(curr.second); MachineBasicBlock::iterator term = MBB->getFirstTerminator(); - MachineInstrIndex endIdx = MachineInstrIndex(); + LiveIndex endIdx = MachineInstrIndex(); if (term != MBB->end()) endIdx = LI.getInstructionIndex(term); else @@ -784,7 +784,7 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB, InsertedPHIDests.begin(), E = InsertedPHIDests.end(); I != E; ++I) { if (RegHandled.insert(I->first).second) { LiveInterval& Int = LI.getOrCreateInterval(I->first); - MachineInstrIndex instrIdx = LI.getInstructionIndex(I->second); + LiveIndex instrIdx = LI.getInstructionIndex(I->second); if (Int.liveAt(LI.getDefIndex(instrIdx))) Int.removeRange(LI.getDefIndex(instrIdx), LI.getNextSlot(LI.getMBBEndIdx(I->second->getParent())), @@ -869,8 +869,8 @@ bool StrongPHIElimination::mergeLiveIntervals(unsigned primary, for (LiveInterval::iterator I = RHS.begin(), E = RHS.end(); I != E; ++I) { LiveRange R = *I; - MachineInstrIndex Start = R.start; - MachineInstrIndex End = R.end; + LiveIndex Start = R.start; + LiveIndex End = R.end; if (LHS.getLiveRangeContaining(Start)) return false; @@ -967,7 +967,7 @@ bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) { LI.computeNumbering(); LiveInterval& Int = LI.getOrCreateInterval(I->first); - MachineInstrIndex instrIdx = + LiveIndex instrIdx = LI.getInstructionIndex(--SI->second->getFirstTerminator()); if (Int.liveAt(LI.getDefIndex(instrIdx))) Int.removeRange(LI.getDefIndex(instrIdx), @@ -1011,7 +1011,7 @@ bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) { if (PI.containsOneValue()) { LI.removeInterval(DestReg); } else { - MachineInstrIndex idx = LI.getDefIndex(LI.getInstructionIndex(PInstr)); + LiveIndex idx = LI.getDefIndex(LI.getInstructionIndex(PInstr)); PI.removeRange(*PI.getLiveRangeContaining(idx), true); } } else { @@ -1033,7 +1033,7 @@ bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) { // If the PHI is not dead, then the valno defined by the PHI // now has an unknown def. - MachineInstrIndex idx = LI.getDefIndex(LI.getInstructionIndex(PInstr)); + LiveIndex idx = LI.getDefIndex(LI.getInstructionIndex(PInstr)); const LiveRange* PLR = PI.getLiveRangeContaining(idx); PLR->valno->setIsPHIDef(true); LiveRange R (LI.getMBBStartIdx(PInstr->getParent()), diff --git a/lib/CodeGen/VirtRegMap.h b/lib/CodeGen/VirtRegMap.h index ca174d5..bdc2d1f 100644 --- a/lib/CodeGen/VirtRegMap.h +++ b/lib/CodeGen/VirtRegMap.h @@ -80,7 +80,7 @@ namespace llvm { /// Virt2SplitKillMap - This is splitted virtual register to its last use /// (kill) index mapping. - IndexedMap<MachineInstrIndex> Virt2SplitKillMap; + IndexedMap<LiveIndex> Virt2SplitKillMap; /// ReMatMap - This is virtual register to re-materialized instruction /// mapping. Each virtual register whose definition is going to be @@ -142,7 +142,7 @@ namespace llvm { VirtRegMap() : MachineFunctionPass(&ID), Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT), Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0), - Virt2SplitKillMap(MachineInstrIndex()), ReMatMap(NULL), + Virt2SplitKillMap(LiveIndex()), ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1), LowSpillSlot(NO_STACK_SLOT), HighSpillSlot(NO_STACK_SLOT) { } virtual bool runOnMachineFunction(MachineFunction &MF); @@ -266,17 +266,17 @@ namespace llvm { } /// @brief record the last use (kill) of a split virtual register. - void addKillPoint(unsigned virtReg, MachineInstrIndex index) { + void addKillPoint(unsigned virtReg, LiveIndex index) { Virt2SplitKillMap[virtReg] = index; } - MachineInstrIndex getKillPoint(unsigned virtReg) const { + LiveIndex getKillPoint(unsigned virtReg) const { return Virt2SplitKillMap[virtReg]; } /// @brief remove the last use (kill) of a split virtual register. void removeKillPoint(unsigned virtReg) { - Virt2SplitKillMap[virtReg] = MachineInstrIndex(); + Virt2SplitKillMap[virtReg] = LiveIndex(); } /// @brief returns true if the specified MachineInstr is a spill point. |