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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2012-08-11 19:05:13 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2012-08-11 19:05:13 +0000 |
| commit | cfc0ad6e48fcbb5d9d7d97307e5b5df6bba53a97 (patch) | |
| tree | 24730fa558c42c12dd366c493121db779c3f2845 | |
| parent | f4cfc4423cd48fd673e1de17aafe4db21e52f876 (diff) | |
| download | external_llvm-cfc0ad6e48fcbb5d9d7d97307e5b5df6bba53a97.zip external_llvm-cfc0ad6e48fcbb5d9d7d97307e5b5df6bba53a97.tar.gz external_llvm-cfc0ad6e48fcbb5d9d7d97307e5b5df6bba53a97.tar.bz2 | |
PR13578: Teach MachineCSE that instructions that use a constant register can be CSE'd safely.
This is common e.g. when doing rip-relative addressing on x86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161728 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/MachineCSE.cpp | 7 | ||||
| -rw-r--r-- | test/CodeGen/X86/lsr-loop-exit-cond.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/machine-cse.ll | 22 |
3 files changed, 29 insertions, 4 deletions
diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index 5153abb..993975e 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -215,8 +215,11 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI, if (MO.isDef() && (MO.isDead() || isPhysDefTriviallyDead(Reg, I, MBB->end()))) continue; - for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) - PhysRefs.insert(*AI); + for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { + // Reading constant physregs is ok. + if (!MRI->isConstantPhysReg(*AI, *MBB->getParent())) + PhysRefs.insert(*AI); + } if (MO.isDef()) PhysDefs.push_back(Reg); } diff --git a/test/CodeGen/X86/lsr-loop-exit-cond.ll b/test/CodeGen/X86/lsr-loop-exit-cond.ll index 6e8d0bf..8a81f70 100644 --- a/test/CodeGen/X86/lsr-loop-exit-cond.ll +++ b/test/CodeGen/X86/lsr-loop-exit-cond.ll @@ -3,11 +3,11 @@ ; CHECK: t: ; CHECK: decq -; CHECK-NEXT: movl (%r11,%rax,4), %eax +; CHECK-NEXT: movl (%r9,%rax,4), %eax ; CHECK-NEXT: jne ; ATOM: t: -; ATOM: movl (%r10,%rax,4), %eax +; ATOM: movl (%r9,%rax,4), %eax ; ATOM-NEXT: decq ; ATOM-NEXT: jne diff --git a/test/CodeGen/X86/machine-cse.ll b/test/CodeGen/X86/machine-cse.ll index 33bef70..d171fd5 100644 --- a/test/CodeGen/X86/machine-cse.ll +++ b/test/CodeGen/X86/machine-cse.ll @@ -134,3 +134,25 @@ return: %retval.0 = phi i8* [ null, %entry ], [ null, %do.cond ], [ %p.0, %do.body ] ret i8* %retval.0 } + +; PR13578 +@t2_global = external global i32 + +declare i1 @t2_func() + +define i32 @t2() { + store i32 42, i32* @t2_global + %c = call i1 @t2_func() + br i1 %c, label %a, label %b + +a: + %l = load i32* @t2_global + ret i32 %l + +b: + ret i32 0 + +; CHECK: t2: +; CHECK: t2_global@GOTPCREL(%rip) +; CHECK-NOT: t2_global@GOTPCREL(%rip) +} |