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| author | Chris Lattner <sabre@nondot.org> | 2006-05-01 05:56:51 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-05-01 05:56:51 +0000 |
| commit | d065c813c83fe4738827940d07b0a4a6d2a2a449 (patch) | |
| tree | dc36ea5677a087c24d5d0d8d17ba5053d9c4926e | |
| parent | 99f2632b4b84a9ad8bad43d8ff56c7ae1393371e (diff) | |
| download | external_llvm-d065c813c83fe4738827940d07b0a4a6d2a2a449.zip external_llvm-d065c813c83fe4738827940d07b0a4a6d2a2a449.tar.gz external_llvm-d065c813c83fe4738827940d07b0a4a6d2a2a449.tar.bz2 | |
Intel mode no longer uses %'s on registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28028 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/2005-12-03-IndirectTailCall.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/fast-cc-merge-stack-adj.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/fast-cc-pass-in-regs.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/overlap-add.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/overlap-shift.ll | 2 |
6 files changed, 7 insertions, 7 deletions
diff --git a/test/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll b/test/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll index 509c07b..8aa5f4d 100644 --- a/test/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll +++ b/test/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'test.*%AL' || \ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'cmove.*%EAX' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'test.*AL' || \ +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'cmove.*EAX' ; This testcase was compiling to: ; diff --git a/test/CodeGen/X86/2005-12-03-IndirectTailCall.ll b/test/CodeGen/X86/2005-12-03-IndirectTailCall.ll index e5a08e9..4efc4b7 100644 --- a/test/CodeGen/X86/2005-12-03-IndirectTailCall.ll +++ b/test/CodeGen/X86/2005-12-03-IndirectTailCall.ll @@ -1,5 +1,5 @@ ; XFAIL: * -; RUN: llvm-as < %s | llc -march=x86 -enable-x86-fastcc | grep 'jmp \*%ecx' +; RUN: llvm-as < %s | llc -march=x86 -enable-x86-fastcc | grep 'jmp \*ecx' declare int %putchar(int) int %main(){ diff --git a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll index de8372c..f31b180 100644 --- a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll +++ b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'add %ESP, 8' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'add ESP, 8' target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll index c9f9cee..6899683 100644 --- a/test/CodeGen/X86/fast-cc-pass-in-regs.ll +++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov %EDX, 1' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov EDX, 1' ; check that fastcc is passing stuff in regs. ; Argument reg passing is disabled due to regalloc issues. FIXME! diff --git a/test/CodeGen/X86/overlap-add.ll b/test/CodeGen/X86/overlap-add.ll index 70878a1..c5fc0bd 100644 --- a/test/CodeGen/X86/overlap-add.ll +++ b/test/CodeGen/X86/overlap-add.ll @@ -6,7 +6,7 @@ ; Check that the shift gets turned into an LEA. -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov %E.X, %E.X' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov E.X, E.X' ; FIXME: We need live variable information about flags to do this xform safely. :( ; XFAIL: * diff --git a/test/CodeGen/X86/overlap-shift.ll b/test/CodeGen/X86/overlap-shift.ll index 4d8c688..48f91e0 100644 --- a/test/CodeGen/X86/overlap-shift.ll +++ b/test/CodeGen/X86/overlap-shift.ll @@ -6,7 +6,7 @@ ; Check that the shift gets turned into an LEA. -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov %E.X, %E.X' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov E.X, E.X' %G = external global int |