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| author | Nadav Rotem <nadav.rotem@intel.com> | 2012-01-12 15:31:55 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-01-12 15:31:55 +0000 |
| commit | d2070b00efb97ee32e360d53edfd7bf6de88d62c (patch) | |
| tree | 3c93ceaaf0439741c09232d24df6537378ab75ae | |
| parent | fb418bab977ad1484f9513de82d710d88d239bc2 (diff) | |
| download | external_llvm-d2070b00efb97ee32e360d53edfd7bf6de88d62c.zip external_llvm-d2070b00efb97ee32e360d53edfd7bf6de88d62c.tar.gz external_llvm-d2070b00efb97ee32e360d53edfd7bf6de88d62c.tar.bz2 | |
Fix a bug in the AVX 256-bit shuffle code in cases where the splat element is on the boundary of two 128-bit vectors.
The attached testcase was stuck in an endless loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148027 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/2012-01-12-extract-sv.ll | 12 |
2 files changed, 13 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 771ca08..c643cef 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4413,7 +4413,7 @@ static SDValue PromoteSplat(ShuffleVectorSDNode *SV, SelectionDAG &DAG) { // Extract the 128-bit part containing the splat element and update // the splat element index when it refers to the higher register. if (Size == 256) { - unsigned Idx = (EltNo > NumElems/2) ? NumElems/2 : 0; + unsigned Idx = (EltNo >= NumElems/2) ? NumElems/2 : 0; V1 = Extract128BitVector(V1, DAG.getConstant(Idx, MVT::i32), DAG, dl); if (Idx > 0) EltNo -= NumElems/2; diff --git a/test/CodeGen/X86/2012-01-12-extract-sv.ll b/test/CodeGen/X86/2012-01-12-extract-sv.ll new file mode 100644 index 0000000..fa8e80f --- /dev/null +++ b/test/CodeGen/X86/2012-01-12-extract-sv.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s -march=x86 -mcpu=corei7-avx -mattr=+avx -mtriple=i686-pc-win32 | FileCheck %s + +; CHECK: endless_loop +define void @endless_loop() { +entry: + %0 = load <8 x i32> addrspace(1)* undef, align 32 + %1 = shufflevector <8 x i32> %0, <8 x i32> undef, <16 x i32> <i32 4, i32 4, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %2 = shufflevector <16 x i32> <i32 undef, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 undef>, <16 x i32> %1, <16 x i32> <i32 16, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 17> + store <16 x i32> %2, <16 x i32> addrspace(1)* undef, align 64 + ret void +; CHECK: ret +} |