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| author | Jim Grosbach <grosbach@apple.com> | 2011-11-15 20:02:06 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-11-15 20:02:06 +0000 |
| commit | d2586daf069f480e924cd7dd2079dd39de331541 (patch) | |
| tree | 8aaea748a2dc7d15ccc9584351c888a76864fc37 | |
| parent | 908f923cfc63c9c941dfa77b13a281f4d845e03c (diff) | |
| download | external_llvm-d2586daf069f480e924cd7dd2079dd39de331541.zip external_llvm-d2586daf069f480e924cd7dd2079dd39de331541.tar.gz external_llvm-d2586daf069f480e924cd7dd2079dd39de331541.tar.bz2 | |
ARM assembly parsing for two-operand form of 'mul' instruction.
Ongoing rdar://10435114.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144688 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
| -rw-r--r-- | test/MC/ARM/basic-arm-instructions.s | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index db76412..c777287 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -5023,3 +5023,7 @@ def LSLi : ARMAsmPseudo<"lsl${s}${p} $Rd, $Rm, $imm", def RORi : ARMAsmPseudo<"ror${s}${p} $Rd, $Rm, $imm", (ins GPR:$Rd, GPR:$Rm, imm0_31:$imm, pred:$p, cc_out:$s)>; + +// 'mul' instruction can be specified with only two operands. +def : ARMInstAlias<"mul${s}${p} $Rn, $Rm", + (MUL rGPR:$Rn, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>; diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 22ad3cd..2217c8a 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -1001,11 +1001,13 @@ Lforward: muls r5, r6, r7 mulgt r5, r6, r7 mulsle r5, r6, r7 + mul r11, r5 @ CHECK: mul r5, r6, r7 @ encoding: [0x96,0x07,0x05,0xe0] @ CHECK: muls r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xe0] @ CHECK: mulgt r5, r6, r7 @ encoding: [0x96,0x07,0x05,0xc0] @ CHECK: mulsle r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xd0] +@ CHECK: mul r11, r11, r5 @ encoding: [0x9b,0x05,0x0b,0xe0] @------------------------------------------------------------------------------ |