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authorBill Wendling <isanbard@gmail.com>2011-05-04 22:54:05 +0000
committerBill Wendling <isanbard@gmail.com>2011-05-04 22:54:05 +0000
commitd29052bf26fec78a35665b6ccd563b62d2d1cf14 (patch)
tree3c276de1b4650fd2ca0333940e1c7c32e90c7804
parent95a7de6b916e49265ebdae04a32f6beda7f89028 (diff)
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SjLj EH could produce a machine basic block that legitimately has more than one
landing pad as its successor. SjLj exception handling jumps to the correct landing pad via a switch statement that's generated right before code-gen. Loosen the constraint in the machine instruction verifier to allow for this. Note, this isn't the most rigorous check since we cannot determine where that switch statement came from. But it's marginally better than turning this check off when SjLj exceptions are used. <rdar://problem/9187612> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130881 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/MachineVerifier.cpp10
-rw-r--r--test/CodeGen/ARM/2011-05-04-MultipleLandingPadSuccs.ll93
2 files changed, 102 insertions, 1 deletions
diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp
index f95f411..fa9092b 100644
--- a/lib/CodeGen/MachineVerifier.cpp
+++ b/lib/CodeGen/MachineVerifier.cpp
@@ -23,6 +23,7 @@
// the verifier errors.
//===----------------------------------------------------------------------===//
+#include "llvm/Instructions.h"
#include "llvm/Function.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveVariables.h"
@@ -32,6 +33,7 @@
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
@@ -394,7 +396,13 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) {
if ((*I)->isLandingPad())
LandingPadSuccs.insert(*I);
}
- if (LandingPadSuccs.size() > 1)
+
+ const MCAsmInfo *AsmInfo = TM->getMCAsmInfo();
+ const BasicBlock *BB = MBB->getBasicBlock();
+ if (LandingPadSuccs.size() > 1 &&
+ !(AsmInfo &&
+ AsmInfo->getExceptionHandlingType() == ExceptionHandling::SjLj &&
+ BB && isa<SwitchInst>(BB->getTerminator())))
report("MBB has more than one landing pad successor", MBB);
// Call AnalyzeBranch. If it succeeds, there several more conditions to check.
diff --git a/test/CodeGen/ARM/2011-05-04-MultipleLandingPadSuccs.ll b/test/CodeGen/ARM/2011-05-04-MultipleLandingPadSuccs.ll
new file mode 100644
index 0000000..0b5f962
--- /dev/null
+++ b/test/CodeGen/ARM/2011-05-04-MultipleLandingPadSuccs.ll
@@ -0,0 +1,93 @@
+; RUN: llc < %s -verify-machineinstrs
+; <rdar://problem/9187612>
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+target triple = "thumbv7-apple-darwin"
+
+define void @func() unnamed_addr align 2 {
+entry:
+ br label %for.cond
+
+for.cond:
+ %tmp2 = phi i32 [ 0, %entry ], [ %add, %for.cond.backedge ]
+ %cmp = icmp ult i32 %tmp2, 14
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body:
+ %add = add i32 %tmp2, 1
+ switch i32 %tmp2, label %sw.default [
+ i32 0, label %sw.bb
+ i32 1, label %sw.bb
+ i32 2, label %sw.bb
+ i32 4, label %sw.bb
+ i32 5, label %sw.bb
+ i32 10, label %sw.bb
+ ]
+
+sw.bb:
+ invoke void @foo()
+ to label %invoke.cont17 unwind label %lpad
+
+invoke.cont17:
+ invoke void @foo()
+ to label %for.cond.backedge unwind label %lpad26
+
+for.cond.backedge:
+ br label %for.cond
+
+lpad:
+ %exn = tail call i8* @llvm.eh.exception() nounwind
+ %eh.selector = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exn, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i8* null) nounwind
+ invoke void @foo()
+ to label %eh.resume unwind label %terminate.lpad
+
+lpad26:
+ %exn27 = tail call i8* @llvm.eh.exception() nounwind
+ %eh.selector28 = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exn27, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i8* null) nounwind
+ invoke void @foo()
+ to label %eh.resume unwind label %terminate.lpad
+
+sw.default:
+ br label %for.cond.backedge
+
+for.end:
+ invoke void @foo()
+ to label %call8.i.i.i.noexc unwind label %lpad44
+
+call8.i.i.i.noexc:
+ ret void
+
+lpad44:
+ %exn45 = tail call i8* @llvm.eh.exception() nounwind
+ %eh.selector46 = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exn45, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i8* null) nounwind
+ invoke void @foo()
+ to label %eh.resume unwind label %terminate.lpad
+
+eh.resume:
+ %exn.slot.0 = phi i8* [ %exn27, %lpad26 ], [ %exn, %lpad ], [ %exn45, %lpad44 ]
+ tail call void @_Unwind_SjLj_Resume_or_Rethrow(i8* %exn.slot.0) noreturn
+ unreachable
+
+terminate.lpad:
+ %exn51 = tail call i8* @llvm.eh.exception() nounwind
+ %eh.selector52 = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exn51, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i8* null) nounwind
+ tail call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+}
+
+declare void @foo()
+
+declare i8* @llvm.eh.exception() nounwind readonly
+
+declare i32 @__gxx_personality_sj0(...)
+
+declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind
+
+declare void @_Unwind_SjLj_Resume_or_Rethrow(i8*)
+
+declare void @_ZSt9terminatev()
+
+!0 = metadata !{metadata !"any pointer", metadata !1}
+!1 = metadata !{metadata !"omnipotent char", metadata !2}
+!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
+!3 = metadata !{metadata !"bool", metadata !1}
+!4 = metadata !{metadata !"int", metadata !1}