diff options
| author | Chris Lattner <sabre@nondot.org> | 2008-07-11 20:53:00 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-07-11 20:53:00 +0000 |
| commit | dc4ac473d31d85958aa22f78314109082502922f (patch) | |
| tree | fea8694afd276f1770ca825f4240ce06f54106e8 | |
| parent | 02983113c9d593fc6d0e7c769e88754a980da8bd (diff) | |
| download | external_llvm-dc4ac473d31d85958aa22f78314109082502922f.zip external_llvm-dc4ac473d31d85958aa22f78314109082502922f.tar.gz external_llvm-dc4ac473d31d85958aa22f78314109082502922f.tar.bz2 | |
add support for returning i128, PR2532.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53472 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 07c88fd..15c225a 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -685,6 +685,20 @@ static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) { DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R1); } break; + case 9: // i128 -> 4 regs + Copy = DAG.getCopyToReg(Chain, ARM::R3, Op.getOperand(7), SDOperand()); + Copy = DAG.getCopyToReg(Copy , ARM::R2, Op.getOperand(5), Copy.getValue(1)); + Copy = DAG.getCopyToReg(Copy , ARM::R1, Op.getOperand(3), Copy.getValue(1)); + Copy = DAG.getCopyToReg(Copy , ARM::R0, Op.getOperand(1), Copy.getValue(1)); + // If we haven't noted the R0+R1 are live out, do so now. + if (DAG.getMachineFunction().getRegInfo().liveout_empty()) { + DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R0); + DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R1); + DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R2); + DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R3); + } + break; + } //We must use RET_FLAG instead of BRIND because BRIND doesn't have a flag |