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authorBob Wilson <bob.wilson@apple.com>2009-10-26 22:59:12 +0000
committerBob Wilson <bob.wilson@apple.com>2009-10-26 22:59:12 +0000
commitdda9583e5194c08ddd409f3e1c211e17acd6d5b8 (patch)
treee906607bb8f84bb674ef0594d42e4f01d05ee5db
parentd2d438e58da4d492d36b9f4b7e5eb917968a7964 (diff)
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Try to get ahead of Johnny Chen and pro-actively add some more ARM encoding
bits. Johnny, please review -- I do not have a good track record of getting these right. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85173 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td18
1 files changed, 16 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 74101c0..b692175 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1092,6 +1092,7 @@ defm SBC : AI1_adde_sube_irs<0b0110, "sbc",
def RSBri : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPFrm,
IIC_iALUi, "rsb", " $dst, $a, $b",
[(set GPR:$dst, (sub so_imm:$b, GPR:$a))]> {
+ let Inst{20} = 0;
let Inst{25} = 1;
}
@@ -1100,6 +1101,7 @@ def RSBrs : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPSoRegFrm,
[(set GPR:$dst, (sub so_reg:$b, GPR:$a))]> {
let Inst{4} = 1;
let Inst{7} = 0;
+ let Inst{20} = 0;
let Inst{25} = 0;
}
@@ -1126,12 +1128,18 @@ def RSCri : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
DPFrm, IIC_iALUi, "rsc", " $dst, $a, $b",
[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>,
Requires<[IsARM, CarryDefIsUnused]> {
+ let Inst{20} = 0;
let Inst{25} = 1;
}
def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
DPSoRegFrm, IIC_iALUsr, "rsc", " $dst, $a, $b",
[(set GPR:$dst, (sube so_reg:$b, GPR:$a))]>,
- Requires<[IsARM, CarryDefIsUnused]>;
+ Requires<[IsARM, CarryDefIsUnused]> {
+ let Inst{4} = 1;
+ let Inst{7} = 0;
+ let Inst{20} = 0;
+ let Inst{25} = 0;
+}
}
// FIXME: Allow these to be predicated.
@@ -1140,12 +1148,18 @@ def RSCSri : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
DPFrm, IIC_iALUi, "rscs $dst, $a, $b",
[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>,
Requires<[IsARM, CarryDefIsUnused]> {
+ let Inst{20} = 1;
let Inst{25} = 1;
}
def RSCSrs : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
DPSoRegFrm, IIC_iALUsr, "rscs $dst, $a, $b",
[(set GPR:$dst, (sube so_reg:$b, GPR:$a))]>,
- Requires<[IsARM, CarryDefIsUnused]>;
+ Requires<[IsARM, CarryDefIsUnused]> {
+ let Inst{4} = 1;
+ let Inst{7} = 0;
+ let Inst{20} = 1;
+ let Inst{25} = 0;
+}
}
// (sub X, imm) gets canonicalized to (add X, -imm). Match this form.