Move more passes to using ETForest instead of DominatorTree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36271 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 19 insertions, 23 deletions

diff --git a/include/llvm/Transforms/Utils/PromoteMemToReg.h b/include/llvm/Transforms/Utils/PromoteMemToReg.h
index 44b11d7..a17e98c 100644
--- a/include/llvm/Transforms/Utils/PromoteMemToReg.h
+++ b/include/llvm/Transforms/Utils/PromoteMemToReg.h
@@ -20,7 +20,7 @@
 namespace llvm {
 
 class AllocaInst;
-class DominatorTree;
+class ETForest;
 class DominanceFrontier;
 class TargetData;
 class AliasSetTracker;
@@ -39,7 +39,7 @@ bool isAllocaPromotable(const AllocaInst *AI, const TargetData &TD);
 /// made to the IR.
 ///
 void PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
-                     DominatorTree &DT, DominanceFrontier &DF,
+                     ETForest &ET, DominanceFrontier &DF,
                      const TargetData &TD, AliasSetTracker *AST = 0);
 
 } // End llvm namespace
diff --git a/lib/Transforms/Scalar/LICM.cpp b/lib/Transforms/Scalar/LICM.cpp
index c9ade928..3b71497 100644
--- a/lib/Transforms/Scalar/LICM.cpp
+++ b/lib/Transforms/Scalar/LICM.cpp
@@ -73,7 +73,6 @@ namespace {
       AU.addRequiredID(LoopSimplifyID);
       AU.addRequired<LoopInfo>();
       AU.addRequired<ETForest>();
-      AU.addRequired<DominatorTree>();      // For scalar promotion (mem2reg)
       AU.addRequired<DominanceFrontier>();  // For scalar promotion (mem2reg)
       AU.addRequired<AliasAnalysis>();
     }
@@ -88,7 +87,6 @@ namespace {
     AliasAnalysis *AA;       // Current AliasAnalysis information
     LoopInfo      *LI;       // Current LoopInfo
     ETForest *ET;       // ETForest for the current Loop...
-    DominatorTree *DT;       // Dominator Tree for the current Loop...
     DominanceFrontier *DF;   // Current Dominance Frontier
 
     // State that is updated as we process loops
@@ -215,7 +213,6 @@ bool LICM::runOnLoop(Loop *L, LPPassManager &LPM) {
   AA = &getAnalysis<AliasAnalysis>();
   DF = &getAnalysis<DominanceFrontier>();
   ET = &getAnalysis<ETForest>();
-  DT = &getAnalysis<DominatorTree>();
 
   CurAST = new AliasSetTracker(*AA);
   // Collect Alias info frmo subloops
@@ -554,7 +551,7 @@ void LICM::sink(Instruction &I) {
     if (AI) {
       std::vector<AllocaInst*> Allocas;
       Allocas.push_back(AI);
-      PromoteMemToReg(Allocas, *DT, *DF, AA->getTargetData(), CurAST);
+      PromoteMemToReg(Allocas, *ET, *DF, AA->getTargetData(), CurAST);
     }
   }
 }
@@ -735,7 +732,7 @@ void LICM::PromoteValuesInLoop() {
   PromotedAllocas.reserve(PromotedValues.size());
   for (unsigned i = 0, e = PromotedValues.size(); i != e; ++i)
     PromotedAllocas.push_back(PromotedValues[i].first);
-  PromoteMemToReg(PromotedAllocas, *DT, *DF, AA->getTargetData(), CurAST);
+  PromoteMemToReg(PromotedAllocas, *ET, *DF, AA->getTargetData(), CurAST);
 }
 
 /// FindPromotableValuesInLoop - Check the current loop for stores to definite
diff --git a/lib/Transforms/Scalar/ScalarReplAggregates.cpp b/lib/Transforms/Scalar/ScalarReplAggregates.cpp
index 5bbb5ae..6e9dc03 100644
--- a/lib/Transforms/Scalar/ScalarReplAggregates.cpp
+++ b/lib/Transforms/Scalar/ScalarReplAggregates.cpp
@@ -53,7 +53,7 @@ namespace {
     // getAnalysisUsage - This pass does not require any passes, but we know it
     // will not alter the CFG, so say so.
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-      AU.addRequired<DominatorTree>();
+      AU.addRequired<ETForest>();
       AU.addRequired<DominanceFrontier>();
       AU.addRequired<TargetData>();
       AU.setPreservesCFG();
@@ -100,7 +100,7 @@ bool SROA::runOnFunction(Function &F) {
 bool SROA::performPromotion(Function &F) {
   std::vector<AllocaInst*> Allocas;
   const TargetData &TD = getAnalysis<TargetData>();
-  DominatorTree     &DT = getAnalysis<DominatorTree>();
+  ETForest         &ET = getAnalysis<ETForest>();
   DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
 
   BasicBlock &BB = F.getEntryBlock();  // Get the entry node for the function
@@ -119,7 +119,7 @@ bool SROA::performPromotion(Function &F) {
 
     if (Allocas.empty()) break;
 
-    PromoteMemToReg(Allocas, DT, DF, TD);
+    PromoteMemToReg(Allocas, ET, DF, TD);
     NumPromoted += Allocas.size();
     Changed = true;
   }
diff --git a/lib/Transforms/Utils/Mem2Reg.cpp b/lib/Transforms/Utils/Mem2Reg.cpp
index 6e2bcb0..9bcf0ab 100644
--- a/lib/Transforms/Utils/Mem2Reg.cpp
+++ b/lib/Transforms/Utils/Mem2Reg.cpp
@@ -36,7 +36,7 @@ namespace {
     // getAnalysisUsage - We need dominance frontiers
     //
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-      AU.addRequired<DominatorTree>();
+      AU.addRequired<ETForest>();
       AU.addRequired<DominanceFrontier>();
       AU.addRequired<TargetData>();
       AU.setPreservesCFG();
@@ -60,7 +60,7 @@ bool PromotePass::runOnFunction(Function &F) {
 
   bool Changed  = false;
 
-  DominatorTree     &DT = getAnalysis<DominatorTree>();
+  ETForest     &ET = getAnalysis<ETForest>();
   DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
 
   while (1) {
@@ -75,7 +75,7 @@ bool PromotePass::runOnFunction(Function &F) {
 
     if (Allocas.empty()) break;
 
-    PromoteMemToReg(Allocas, DT, DF, TD);
+    PromoteMemToReg(Allocas, ET, DF, TD);
     NumPromoted += Allocas.size();
     Changed = true;
   }
diff --git a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
index be80423..25d9ef5 100644
--- a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
+++ b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
@@ -88,7 +88,7 @@ namespace {
     ///
     std::vector<AllocaInst*> Allocas;
     SmallVector<AllocaInst*, 16> &RetryList;
-    DominatorTree &DT;
+    ETForest &ET;
     DominanceFrontier &DF;
     const TargetData &TD;
 
@@ -127,10 +127,10 @@ namespace {
 
   public:
     PromoteMem2Reg(const std::vector<AllocaInst*> &A,
-                   SmallVector<AllocaInst*, 16> &Retry, DominatorTree &dt,
+                   SmallVector<AllocaInst*, 16> &Retry, ETForest &et,
                    DominanceFrontier &df, const TargetData &td,
                    AliasSetTracker *ast)
-      : Allocas(A), RetryList(Retry), DT(dt), DF(df), TD(td), AST(ast) {}
+      : Allocas(A), RetryList(Retry), ET(et), DF(df), TD(td), AST(ast) {}
 
     void run();
 
@@ -139,13 +139,13 @@ namespace {
     bool properlyDominates(Instruction *I1, Instruction *I2) const {
       if (InvokeInst *II = dyn_cast<InvokeInst>(I1))
         I1 = II->getNormalDest()->begin();
-      return DT[I1->getParent()]->properlyDominates(DT[I2->getParent()]);
+      return ET.properlyDominates(I1->getParent(), I2->getParent());
     }
     
     /// dominates - Return true if BB1 dominates BB2 using the DominatorTree.
     ///
     bool dominates(BasicBlock *BB1, BasicBlock *BB2) const {
-      return DT[BB1]->dominates(DT[BB2]);
+      return ET.dominates(BB1, BB2);
     }
 
   private:
@@ -534,8 +534,7 @@ void PromoteMem2Reg::MarkDominatingPHILive(BasicBlock *BB, unsigned AllocaNum,
                                       SmallPtrSet<PHINode*, 16> &DeadPHINodes) {
   // Scan the immediate dominators of this block looking for a block which has a
   // PHI node for Alloca num.  If we find it, mark the PHI node as being alive!
-  for (DominatorTree::Node *N = DT[BB]; N; N = N->getIDom()) {
-    BasicBlock *DomBB = N->getBlock();
+  for (BasicBlock* DomBB = BB; DomBB; DomBB = ET.getIDom(DomBB)) {
     DenseMap<std::pair<BasicBlock*, unsigned>, PHINode*>::iterator
       I = NewPhiNodes.find(std::make_pair(DomBB, AllocaNum));
     if (I != NewPhiNodes.end()) {
@@ -806,13 +805,13 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
 /// made to the IR.
 ///
 void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
-                           DominatorTree &DT, DominanceFrontier &DF,
+                           ETForest &ET, DominanceFrontier &DF,
                            const TargetData &TD, AliasSetTracker *AST) {
   // If there is nothing to do, bail out...
   if (Allocas.empty()) return;
 
   SmallVector<AllocaInst*, 16> RetryList;
-  PromoteMem2Reg(Allocas, RetryList, DT, DF, TD, AST).run();
+  PromoteMem2Reg(Allocas, RetryList, ET, DF, TD, AST).run();
 
   // PromoteMem2Reg may not have been able to promote all of the allocas in one
   // pass, run it again if needed.
@@ -830,7 +829,7 @@ void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
 
     NewAllocas.assign(RetryList.begin(), RetryList.end());
     RetryList.clear();
-    PromoteMem2Reg(NewAllocas, RetryList, DT, DF, TD, AST).run();
+    PromoteMem2Reg(NewAllocas, RetryList, ET, DF, TD, AST).run();
     NewAllocas.clear();
   }
 }