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| author | Evan Cheng <evan.cheng@apple.com> | 2009-01-19 19:06:11 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-01-19 19:06:11 +0000 |
| commit | e18cc42f7fa71407639499ec94eac259bd472bb3 (patch) | |
| tree | 6d5fa0e75ac8a8732c078504ae8cc185c32e2842 | |
| parent | a7482db176741cf6d96d7905857f72bb9cf3437e (diff) | |
| download | external_llvm-e18cc42f7fa71407639499ec94eac259bd472bb3.zip external_llvm-e18cc42f7fa71407639499ec94eac259bd472bb3.tar.gz external_llvm-e18cc42f7fa71407639499ec94eac259bd472bb3.tar.bz2 | |
DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62519 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/rem-2.ll | 7 |
2 files changed, 8 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 842bb13..9b42d00 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -1405,7 +1405,7 @@ SDNode *X86DAGToDAGISel::Select(SDValue N) { InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode(), LoReg, N0, SDValue()).getValue(1); - if (isSigned) { + if (isSigned && !CurDAG->SignBitIsZero(N0)) { // Sign extend the low part into the high part. InFlag = SDValue(CurDAG->getTargetNode(SExtOpcode, MVT::Flag, InFlag), 0); diff --git a/test/CodeGen/X86/rem-2.ll b/test/CodeGen/X86/rem-2.ll new file mode 100644 index 0000000..3e17fc0 --- /dev/null +++ b/test/CodeGen/X86/rem-2.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep cltd + +define i32 @test(i32 %X) nounwind readnone { +entry: + %0 = srem i32 41, %X + ret i32 %0 +} |