Enable FastISel by default (on x86 and x86-64) with the -fast option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56930 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 16 insertions, 4 deletions

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 9368540..bd8d499 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -53,10 +53,15 @@ DisablePostRAScheduler("disable-post-RA-scheduler",
                        cl::desc("Disable scheduling after register allocation"),
                        cl::init(true));
 
-static cl::opt<bool, true>
-FastISelOption("fast-isel", cl::Hidden,
-               cl::desc("Enable the experimental \"fast\" instruction selector"),
-               cl::location(EnableFastISel));
+// Enable or disable FastISel. Both options are needed, because
+// FastISel is enabled by default with -fast, and we wish to be
+// able to enable or disable fast-isel independently from -fast.
+static cl::opt<bool>
+EnableFastISelOption("fast-isel", cl::Hidden,
+  cl::desc("Enable the experimental \"fast\" instruction selector"));
+static cl::opt<bool>
+DisableFastISelOption("disable-fast-isel", cl::Hidden,
+  cl::desc("Disable the experimental \"fast\" instruction selector"));
 
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
@@ -169,6 +174,13 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
 
   // Standard Lower-Level Passes.
 
+  // Enable FastISel with -fast, but allow that to be overridden.
+  assert((!EnableFastISelOption || !DisableFastISelOption) &&
+         "Both -fast-isel and -disable-fast-isel given!");
+  if (EnableFastISelOption ||
+      (Fast && !DisableFastISelOption))
+    EnableFastISel = true;
+
   // Ask the target for an isel.
   if (addInstSelector(PM, Fast))
     return true;