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authorDuncan Sands <baldrick@free.fr>2009-05-16 03:28:54 +0000
committerDuncan Sands <baldrick@free.fr>2009-05-16 03:28:54 +0000
commite556720ea8d60581c95d3ca3f9175a3688150d95 (patch)
tree9ecbe9995a7c60c31d3cb1fcf3179572d14933f0
parentf8eac02fc1f544f9b18ffdcda68b3a9849448429 (diff)
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Pacify gcc-4.3, which suggests explicit braces here
to avoid an ambiguous else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71924 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/MachineVerifier.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp
index 22866c6..70ccae6 100644
--- a/lib/CodeGen/MachineVerifier.cpp
+++ b/lib/CodeGen/MachineVerifier.cpp
@@ -345,7 +345,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
addRegWithSubRegs(regsKilled, Reg);
}
// Explicit use of a dead register.
- if (!MO->isImplicit() && !regsLive.count(Reg))
+ if (!MO->isImplicit() && !regsLive.count(Reg)) {
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
// Reserved registers may be used even when 'dead'.
if (!isReserved(Reg))
@@ -360,6 +360,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
else if (MI->getOpcode() != TargetInstrInfo::PHI)
MInfo.vregsLiveIn.insert(std::make_pair(Reg, MI));
}
+ }
} else {
// Register defined.
// TODO: verify that earlyclobber ops are not used.