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authorEric Christopher <echristo@apple.com>2010-11-03 20:21:17 +0000
committerEric Christopher <echristo@apple.com>2010-11-03 20:21:17 +0000
commite5b13cfdd0fc6529f8e2b3704ccaf20369aec486 (patch)
tree074102af5ebe769704badfbb44a4053acc619cad
parentc0b14a250b61beb78d75d10c3124bbfd5355905c (diff)
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Optimize generated code for integer materialization a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118192 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMFastISel.cpp14
1 files changed, 13 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index 0982ca0..cf4d61e 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -434,6 +434,19 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) {
// For now 32-bit only.
if (VT != MVT::i32) return false;
+ unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
+
+ // If we can do this in a single instruction without a constant pool entry
+ // do so now.
+ const ConstantInt *CI = cast<ConstantInt>(C);
+ if (isUInt<16>(CI->getSExtValue())) {
+ unsigned Opc = isThumb ? ARM::t2MOVi16 : ARM::MOVi16;
+ AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+ TII.get(Opc), DestReg)
+ .addImm(CI->getSExtValue()));
+ return DestReg;
+ }
+
// MachineConstantPool wants an explicit alignment.
unsigned Align = TD.getPrefTypeAlignment(C->getType());
if (Align == 0) {
@@ -441,7 +454,6 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) {
Align = TD.getTypeAllocSize(C->getType());
}
unsigned Idx = MCP.getConstantPoolIndex(C, Align);
- unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
if (isThumb)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,