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author | Evan Cheng <evan.cheng@apple.com> | 2012-01-12 02:35:23 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2012-01-12 02:35:23 +0000 |
commit | e5dafc395656645c3a5d90e7c1b55477800f2ab1 (patch) | |
tree | c97e1828e62eac37f2525745246144172ea262be | |
parent | c59d9df2487accc82c2d128bba2aaf029c4a077d (diff) | |
download | external_llvm-e5dafc395656645c3a5d90e7c1b55477800f2ab1.zip external_llvm-e5dafc395656645c3a5d90e7c1b55477800f2ab1.tar.gz external_llvm-e5dafc395656645c3a5d90e7c1b55477800f2ab1.tar.bz2 |
Move Sched::Preference out of TargetMachine.h where it is not referenced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148014 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/CodeGen/ScheduleDAG.h | 2 | ||||
-rw-r--r-- | include/llvm/Target/TargetLowering.h | 9 | ||||
-rw-r--r-- | include/llvm/Target/TargetMachine.h | 9 |
3 files changed, 10 insertions, 10 deletions
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h index cdc4f43..58a3a9c 100644 --- a/include/llvm/CodeGen/ScheduleDAG.h +++ b/include/llvm/CodeGen/ScheduleDAG.h @@ -16,7 +16,7 @@ #define LLVM_CODEGEN_SCHEDULEDAG_H #include "llvm/CodeGen/MachineBasicBlock.h" -#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetLowering.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/GraphTraits.h" diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index e3b2ebb..456966b 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -53,6 +53,15 @@ namespace llvm { class TargetLoweringObjectFile; class Value; + namespace Sched { + enum Preference { + None, // No preference + RegPressure, // Scheduling for lowest register pressure. + Hybrid, // Scheduling for both latency and register pressure. + ILP // Scheduling for ILP in low register pressure mode. + }; + } + // FIXME: should this be here? namespace TLSModel { enum Model { diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index c169e06..61c60c5 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -44,15 +44,6 @@ class TargetSubtargetInfo; class formatted_raw_ostream; class raw_ostream; -namespace Sched { - enum Preference { - None, // No preference - RegPressure, // Scheduling for lowest register pressure. - Hybrid, // Scheduling for both latency and register pressure. - ILP // Scheduling for ILP in low register pressure mode. - }; -} - //===----------------------------------------------------------------------===// /// /// TargetMachine - Primary interface to the complete machine description for |