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author | Chris Lattner <sabre@nondot.org> | 2005-09-10 00:21:06 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-09-10 00:21:06 +0000 |
commit | e6ec9f20c9df6387b68874e4c49035d3c9c5527f (patch) | |
tree | c54415d70802165e4a5fb24de02772c4b6d654e3 | |
parent | 13d58e71b7ab2857162b88860c56dce4c9cea3de (diff) | |
download | external_llvm-e6ec9f20c9df6387b68874e4c49035d3c9c5527f.zip external_llvm-e6ec9f20c9df6387b68874e4c49035d3c9c5527f.tar.gz external_llvm-e6ec9f20c9df6387b68874e4c49035d3c9c5527f.tar.bz2 |
PowerPC cannot truncstore i1 natively
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23304 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 3 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 1 |
3 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 0ae7ad6..e342d71 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -1263,7 +1263,6 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) { } else { //ISD::TRUNCSTORE switch(cast<VTSDNode>(N->getOperand(4))->getVT()) { default: assert(0 && "unknown Type in store"); - case MVT::i1: case MVT::i8: Opc = isIdx ? PPC::STBX : PPC::STB; break; case MVT::i16: Opc = isIdx ? PPC::STHX : PPC::STH; break; } diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index bf8dbed..340c0a4 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -91,6 +91,9 @@ PPC32TargetLowering::PPC32TargetLowering(TargetMachine &TM) setOperationAction(ISD::SINT_TO_FP, MVT::i32, Expand); setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); + // PowerPC does not have truncstore for i1. + setOperationAction(ISD::TRUNCSTORE, MVT::i1, Promote); + // 64 bit PowerPC implementations have instructions to facilitate conversion // between i64 and fp. if (TM.getSubtarget<PPCSubtarget>().is64Bit()) { diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 2cb3d8f..73e9e2f 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -1795,7 +1795,6 @@ void ISel::Select(SDOperand N) { } else { //ISD::TRUNCSTORE switch(cast<VTSDNode>(Node->getOperand(4))->getVT()) { default: assert(0 && "unknown Type in store"); - case MVT::i1: case MVT::i8: Opc = PPC::STB; break; case MVT::i16: Opc = PPC::STH; break; } |