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author | Evan Cheng <evan.cheng@apple.com> | 2010-11-19 06:15:10 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-11-19 06:15:10 +0000 |
commit | e8e67e13d49219bc0acd73961f3b2dd2ccb90cf4 (patch) | |
tree | b5765bd47282d20568559979da35e4858df7772b | |
parent | e7fbdcdfc6b5e562d2741cceec8aee1bd3dd1c2d (diff) | |
download | external_llvm-e8e67e13d49219bc0acd73961f3b2dd2ccb90cf4.zip external_llvm-e8e67e13d49219bc0acd73961f3b2dd2ccb90cf4.tar.gz external_llvm-e8e67e13d49219bc0acd73961f3b2dd2ccb90cf4.tar.bz2 |
Fix an obvious oversight.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119792 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 397c1f7..ca8e7de 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1171,7 +1171,7 @@ def t2SUBrSPs : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, t2_so_reg:$imm), def t2SDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi, "sdiv", "\t$Rd, $Rn, $Rm", [(set rGPR:$Rd, (sdiv rGPR:$Rn, rGPR:$Rm))]>, - Requires<[HasDivide]> { + Requires<[HasDivide, IsThumb2]> { let Inst{31-27} = 0b11111; let Inst{26-21} = 0b011100; let Inst{20} = 0b1; @@ -1182,7 +1182,7 @@ def t2SDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi, def t2UDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi, "udiv", "\t$Rd, $Rn, $Rm", [(set rGPR:$Rd, (udiv rGPR:$Rn, rGPR:$Rm))]>, - Requires<[HasDivide]> { + Requires<[HasDivide, IsThumb2]> { let Inst{31-27} = 0b11111; let Inst{26-21} = 0b011101; let Inst{20} = 0b1; |