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author | Dan Gohman <gohman@apple.com> | 2009-01-15 16:58:17 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-01-15 16:58:17 +0000 |
commit | e9530ecae4897fe8157bd4d7616043bd8c0484e2 (patch) | |
tree | 3001c878835f6f2c17fae20fcac7bf27388a29db | |
parent | 0d137d7f35fba98f668098b3badf644efacf0e08 (diff) | |
download | external_llvm-e9530ecae4897fe8157bd4d7616043bd8c0484e2.zip external_llvm-e9530ecae4897fe8157bd4d7616043bd8c0484e2.tar.gz external_llvm-e9530ecae4897fe8157bd4d7616043bd8c0484e2.tar.bz2 |
More consts on TargetLowering references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62262 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | 9 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 6 |
4 files changed, 9 insertions, 10 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 26a02ba..258d807 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -736,7 +736,7 @@ SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG, /// ExpandUnalignedLoad - Expands an unaligned load to 2 half-size loads. static SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG, - TargetLowering &TLI) { + const TargetLowering &TLI) { int SVOffset = LD->getSrcValueOffset(); SDValue Chain = LD->getChain(); SDValue Ptr = LD->getBasePtr(); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 34f33b0..b83d537 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -4982,7 +4982,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { return "<<Unknown Machine Node>>"; } if (G) { - TargetLowering &TLI = G->getTargetLoweringInfo(); + const TargetLowering &TLI = G->getTargetLoweringInfo(); const char *Name = TLI.getTargetNodeName(getOpcode()); if (Name) return Name; return "<<Unknown Target Node>>"; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index 5740cc9..60a4f61 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -380,7 +380,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, MVT ValueVT, ISD::NodeType AssertOp = ISD::DELETED_NODE) { assert(NumParts > 0 && "No parts to assemble!"); - TargetLowering &TLI = DAG.getTargetLoweringInfo(); + const TargetLowering &TLI = DAG.getTargetLoweringInfo(); SDValue Val = Parts[0]; if (NumParts > 1) { @@ -525,7 +525,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, static void getCopyToParts(SelectionDAG &DAG, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, ISD::NodeType ExtendKind = ISD::ANY_EXTEND) { - TargetLowering &TLI = DAG.getTargetLoweringInfo(); + const TargetLowering &TLI = DAG.getTargetLoweringInfo(); MVT PtrVT = TLI.getPointerTy(); MVT ValueVT = Val.getValueType(); unsigned PartBits = PartVT.getSizeInBits(); @@ -648,8 +648,7 @@ static void getCopyToParts(SelectionDAG &DAG, SDValue Val, // Handle a multi-element vector. MVT IntermediateVT, RegisterVT; unsigned NumIntermediates; - unsigned NumRegs = - DAG.getTargetLoweringInfo() + unsigned NumRegs = TLI .getVectorTypeBreakdown(ValueVT, IntermediateVT, NumIntermediates, RegisterVT); unsigned NumElements = ValueVT.getVectorNumElements(); @@ -4819,7 +4818,7 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo, /// processed uses a memory 'm' constraint. static bool hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos, - TargetLowering &TLI) { + const TargetLowering &TLI) { for (unsigned i = 0, e = CInfos.size(); i != e; ++i) { InlineAsm::ConstraintInfo &CI = CInfos[i]; for (unsigned j = 0, ee = CI.Codes.size(); j != ee; ++j) { diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 3688a13..744ea00 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -141,8 +141,8 @@ namespace llvm { const TargetMachine *TM, MachineBasicBlock *BB, bool Fast) { - TargetLowering &TLI = IS->getTargetLowering(); - + const TargetLowering &TLI = IS->getTargetLowering(); + if (Fast) return createFastDAGScheduler(IS, DAG, TM, BB, Fast); if (TLI.getSchedulingPreference() == TargetLowering::SchedulingForLatency) @@ -399,7 +399,7 @@ static bool IsPossiblyOverwrittenArgumentOfTailCall(SDValue Op, /// CheckDAGForTailCallsAndFixThem - This Function looks for CALL nodes in the /// DAG and fixes their tailcall attribute operand. static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG, - TargetLowering& TLI) { + const TargetLowering& TLI) { SDNode * Ret = NULL; SDValue Terminator = DAG.getRoot(); |