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authorMihai Popa <mihail.popa@gmail.com>2013-08-16 12:03:00 +0000
committerMihai Popa <mihail.popa@gmail.com>2013-08-16 12:03:00 +0000
commite97fc44045732de9fc4715241013f9238ec007dc (patch)
treee19368a4ad557e77bfa7b41c7d3853ddf40264cd
parent8b36f9e4314ac4d786d2d4fd5fa9e7858487ee9e (diff)
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Add support for Thumb2 literal loads with negative zero offset
Thumb2 literal loads use an offset encoding which allows for negative zero. This fixes parsing and encoding so that #-0 is correctly processed. The parser represents #-0 as INT32_MIN. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188549 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp2
-rw-r--r--lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp6
-rw-r--r--test/MC/ARM/basic-thumb2-instructions.s12
3 files changed, 16 insertions, 4 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index d48ece1..df9306a 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -1793,8 +1793,6 @@ public:
void addMemPCRelImm12Operands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
int32_t Imm = Memory.OffsetImm->getValue();
- // FIXME: Handle #-0
- if (Imm == INT32_MIN) Imm = 0;
Inst.addOperand(MCOperand::CreateImm(Imm));
}
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
index c0c21d3..a247b02 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
@@ -778,8 +778,10 @@ getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx,
} else {
Reg = ARM::PC;
int32_t Offset = MO.getImm();
- // FIXME: Handle #-0.
- if (Offset < 0) {
+ if (Offset == INT32_MIN) {
+ Offset = 0;
+ isAdd = false;
+ } else if (Offset < 0) {
Offset *= -1;
isAdd = false;
}
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 86f37b8..a7f9ac6 100644
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -830,6 +830,18 @@ _func:
@ CHECK: ldr.w pc, [pc, #256] @ encoding: [0xdf,0xf8,0x00,0xf1]
@ CHECK: ldr.w pc, [pc, #-400] @ encoding: [0x5f,0xf8,0x90,0xf1]
+ ldrb r9, [pc, #-0]
+ ldrsb r11, [pc, #-0]
+ ldrh r10, [pc, #-0]
+ ldrsh r1, [pc, #-0]
+ ldr r5, [pc, #-0]
+
+@ CHECK: ldrb.w r9, [pc, #-0] @ encoding: [0x1f,0xf8,0x00,0x90]
+@ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0]
+@ CHECK: ldrh.w r10, [pc, #-0] @ encoding: [0x3f,0xf8,0x00,0xa0]
+@ CHECK: ldrsh.w r1, [pc, #-0] @ encoding: [0x3f,0xf9,0x00,0x10]
+@ CHECK: ldr.w r5, [pc, #-0] @ encoding: [0x5f,0xf8,0x00,0x50]
+
@------------------------------------------------------------------------------
@ LDR(register)
@------------------------------------------------------------------------------