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| author | Daniel Dunbar <daniel@zuster.org> | 2010-01-30 00:24:00 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2010-01-30 00:24:00 +0000 |
| commit | ec2b1f1beb134872aba4faf2e7a9c7eabcf64df9 (patch) | |
| tree | da12b98ab715e0d441efb36bde6b5a069db5c951 | |
| parent | b489d0f88a59cf620fad7a0a82037ad2cd3cad16 (diff) | |
| download | external_llvm-ec2b1f1beb134872aba4faf2e7a9c7eabcf64df9.zip external_llvm-ec2b1f1beb134872aba4faf2e7a9c7eabcf64df9.tar.gz external_llvm-ec2b1f1beb134872aba4faf2e7a9c7eabcf64df9.tar.bz2 | |
AsmMatcher/X86: Separate out sublass for memory operands that have no segment
register, and use to cleanup a FIXME in X86AsmParser.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94859 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/AsmParser/X86AsmParser.cpp | 18 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 6 |
2 files changed, 19 insertions, 5 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 19fbf85..cc4498b 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -172,6 +172,10 @@ struct X86Operand : public MCParsedAsmOperand { bool isMem() const { return Kind == Memory; } + bool isNoSegMem() const { + return Kind == Memory && !getMemSegReg(); + } + bool isReg() const { return Kind == Register; } void addRegOperands(MCInst &Inst, unsigned N) const { @@ -191,16 +195,22 @@ struct X86Operand : public MCParsedAsmOperand { } void addMemOperands(MCInst &Inst, unsigned N) const { - assert((N == 4 || N == 5) && "Invalid number of operands!"); + assert((N == 5) && "Invalid number of operands!"); Inst.addOperand(MCOperand::CreateReg(getMemBaseReg())); Inst.addOperand(MCOperand::CreateImm(getMemScale())); Inst.addOperand(MCOperand::CreateReg(getMemIndexReg())); Inst.addOperand(MCOperand::CreateExpr(getMemDisp())); + Inst.addOperand(MCOperand::CreateReg(getMemSegReg())); + } + + void addNoSegMemOperands(MCInst &Inst, unsigned N) const { + assert((N == 4) && "Invalid number of operands!"); - // FIXME: What a hack. - if (N == 5) - Inst.addOperand(MCOperand::CreateReg(getMemSegReg())); + Inst.addOperand(MCOperand::CreateReg(getMemBaseReg())); + Inst.addOperand(MCOperand::CreateImm(getMemScale())); + Inst.addOperand(MCOperand::CreateReg(getMemIndexReg())); + Inst.addOperand(MCOperand::CreateExpr(getMemDisp())); } static X86Operand *CreateToken(StringRef Str, SMLoc Loc) { diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 396cb53..6853af3 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -196,6 +196,10 @@ def X86MemAsmOperand : AsmOperandClass { let Name = "Mem"; let SuperClass = ?; } +def X86NoSegMemAsmOperand : AsmOperandClass { + let Name = "NoSegMem"; + let SuperClass = X86MemAsmOperand; +} class X86MemOperand<string printMethod> : Operand<iPTR> { let PrintMethod = printMethod; let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm); @@ -235,7 +239,7 @@ def i8mem_NOREX : Operand<i64> { def lea32mem : Operand<i32> { let PrintMethod = "printlea32mem"; let MIOperandInfo = (ops GR32, i8imm, GR32_NOSP, i32imm); - let ParserMatchClass = X86MemAsmOperand; + let ParserMatchClass = X86NoSegMemAsmOperand; } def SSECC : Operand<i8> { |