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author | Jim Grosbach <grosbach@apple.com> | 2011-11-14 23:11:19 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-11-14 23:11:19 +0000 |
commit | ef448767a35148261d6c82a8e55e6e2f4be8e631 (patch) | |
tree | 18491e072b893baac1ab2da33875cb90464a9726 | |
parent | 2c42b8c912b62071c27454182cdef60e3b584083 (diff) | |
download | external_llvm-ef448767a35148261d6c82a8e55e6e2f4be8e631.zip external_llvm-ef448767a35148261d6c82a8e55e6e2f4be8e631.tar.gz external_llvm-ef448767a35148261d6c82a8e55e6e2f4be8e631.tar.bz2 |
ARM parsing optional datatype suffix for VAND/VEOR/VORR instructions.
rdar://10435076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144587 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 21 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 18 | ||||
-rw-r--r-- | test/MC/ARM/neon-bitwise-encoding.s | 177 |
3 files changed, 215 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 841ca74..90ee018 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -1995,6 +1995,20 @@ class NEONFPPat<dag pattern, dag result> : Pat<pattern, result> { // VFP/NEON Instruction aliases for type suffices. class VFPDataTypeInstAlias<string opc, string dt, string asm, dag Result> : InstAlias<!strconcat(opc, dt, asm), Result>; +multiclass VFPDT8InstAlias<string opc, string asm, dag Result> { + def _8 : VFPDataTypeInstAlias<opc, ".8", asm, Result>; + def I8 : VFPDataTypeInstAlias<opc, ".i8", asm, Result>; + def S8 : VFPDataTypeInstAlias<opc, ".s8", asm, Result>; + def U8 : VFPDataTypeInstAlias<opc, ".u8", asm, Result>; + def F8 : VFPDataTypeInstAlias<opc, ".p8", asm, Result>; +} +multiclass VFPDT16InstAlias<string opc, string asm, dag Result> { + def _16 : VFPDataTypeInstAlias<opc, ".16", asm, Result>; + def I16 : VFPDataTypeInstAlias<opc, ".i16", asm, Result>; + def S16 : VFPDataTypeInstAlias<opc, ".s16", asm, Result>; + def U16 : VFPDataTypeInstAlias<opc, ".u16", asm, Result>; + def F16 : VFPDataTypeInstAlias<opc, ".p16", asm, Result>; +} multiclass VFPDT32InstAlias<string opc, string asm, dag Result> { def _32 : VFPDataTypeInstAlias<opc, ".32", asm, Result>; def I32 : VFPDataTypeInstAlias<opc, ".i32", asm, Result>; @@ -2011,4 +2025,9 @@ multiclass VFPDT64InstAlias<string opc, string asm, dag Result> { def F64 : VFPDataTypeInstAlias<opc, ".f64", asm, Result>; def D : VFPDataTypeInstAlias<opc, ".d", asm, Result>; } - +multiclass VFPDTAnyInstAlias<string opc, string asm, dag Result> { + defm : VFPDT8InstAlias<opc, asm, Result>; + defm : VFPDT16InstAlias<opc, asm, Result>; + defm : VFPDT32InstAlias<opc, asm, Result>; + defm : VFPDT64InstAlias<opc, asm, Result>; +} diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 07403c1..d83f6b8 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -5179,3 +5179,21 @@ def : Pat<(v2f64 (bitconvert (v4i32 QPR:$src))), (v2f64 QPR:$src)>; def : Pat<(v2f64 (bitconvert (v8i16 QPR:$src))), (v2f64 QPR:$src)>; def : Pat<(v2f64 (bitconvert (v16i8 QPR:$src))), (v2f64 QPR:$src)>; def : Pat<(v2f64 (bitconvert (v4f32 QPR:$src))), (v2f64 QPR:$src)>; + + +//===----------------------------------------------------------------------===// +// Assembler aliases +// + +defm : VFPDTAnyInstAlias<"vand${p}", "$Vd, $Vn, $Vm", + (VANDd DPR:$Vd, DPR:$Vn, DPR:$Vm, pred:$p)>; +defm : VFPDTAnyInstAlias<"vand${p}", "$Vd, $Vn, $Vm", + (VANDq QPR:$Vd, QPR:$Vn, QPR:$Vm, pred:$p)>; +defm : VFPDTAnyInstAlias<"veor${p}", "$Vd, $Vn, $Vm", + (VEORd DPR:$Vd, DPR:$Vn, DPR:$Vm, pred:$p)>; +defm : VFPDTAnyInstAlias<"veor${p}", "$Vd, $Vn, $Vm", + (VEORq QPR:$Vd, QPR:$Vn, QPR:$Vm, pred:$p)>; +defm : VFPDTAnyInstAlias<"vorr${p}", "$Vd, $Vn, $Vm", + (VORRd DPR:$Vd, DPR:$Vn, DPR:$Vm, pred:$p)>; +defm : VFPDTAnyInstAlias<"vorr${p}", "$Vd, $Vn, $Vm", + (VORRq QPR:$Vd, QPR:$Vn, QPR:$Vm, pred:$p)>; diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s index 72d0256..0922cac 100644 --- a/test/MC/ARM/neon-bitwise-encoding.s +++ b/test/MC/ARM/neon-bitwise-encoding.s @@ -53,3 +53,180 @@ @ CHECK: vbsl d18, d17, d16 @ encoding: [0xb0,0x21,0x51,0xf3] @ CHECK: vbsl q8, q10, q9 @ encoding: [0xf2,0x01,0x54,0xf3] + + +@ Size suffices are optional. + veor q4, q7, q3 + veor.8 q4, q7, q3 + veor.16 q4, q7, q3 + veor.32 q4, q7, q3 + veor.64 q4, q7, q3 + + veor.i8 q4, q7, q3 + veor.i16 q4, q7, q3 + veor.i32 q4, q7, q3 + veor.i64 q4, q7, q3 + + veor.s8 q4, q7, q3 + veor.s16 q4, q7, q3 + veor.s32 q4, q7, q3 + veor.s64 q4, q7, q3 + + veor.u8 q4, q7, q3 + veor.u16 q4, q7, q3 + veor.u32 q4, q7, q3 + veor.u64 q4, q7, q3 + + veor.p8 q4, q7, q3 + veor.p16 q4, q7, q3 + veor.f32 q4, q7, q3 + veor.f64 q4, q7, q3 + + veor.f q4, q7, q3 + veor.d q4, q7, q3 + +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] + +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] + +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] + +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] + +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] + +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] +@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3] + + + vand d4, d7, d3 + vand.8 d4, d7, d3 + vand.16 d4, d7, d3 + vand.32 d4, d7, d3 + vand.64 d4, d7, d3 + + vand.i8 d4, d7, d3 + vand.i16 d4, d7, d3 + vand.i32 d4, d7, d3 + vand.i64 d4, d7, d3 + + vand.s8 d4, d7, d3 + vand.s16 d4, d7, d3 + vand.s32 d4, d7, d3 + vand.s64 d4, d7, d3 + + vand.u8 d4, d7, d3 + vand.u16 d4, d7, d3 + vand.u32 d4, d7, d3 + vand.u64 d4, d7, d3 + + vand.p8 d4, d7, d3 + vand.p16 d4, d7, d3 + vand.f32 d4, d7, d3 + vand.f64 d4, d7, d3 + + vand.f d4, d7, d3 + vand.d d4, d7, d3 + +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] + +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] + +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] + +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] + +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] + +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] +@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2] + + vorr d4, d7, d3 + vorr.8 d4, d7, d3 + vorr.16 d4, d7, d3 + vorr.32 d4, d7, d3 + vorr.64 d4, d7, d3 + + vorr.i8 d4, d7, d3 + vorr.i16 d4, d7, d3 + vorr.i32 d4, d7, d3 + vorr.i64 d4, d7, d3 + + vorr.s8 d4, d7, d3 + vorr.s16 d4, d7, d3 + vorr.s32 q4, q7, q3 + vorr.s64 q4, q7, q3 + + vorr.u8 q4, q7, q3 + vorr.u16 q4, q7, q3 + vorr.u32 q4, q7, q3 + vorr.u64 q4, q7, q3 + + vorr.p8 q4, q7, q3 + vorr.p16 q4, q7, q3 + vorr.f32 q4, q7, q3 + vorr.f64 q4, q7, q3 + + vorr.f q4, q7, q3 + vorr.d q4, q7, q3 + +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] + +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] + +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] + +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] + +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] + +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] +@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2] |