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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2011-08-10 16:26:42 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2011-08-10 16:26:42 +0000 |
| commit | f5ade5d39abe5cb12a8202c604321d5992e4a168 (patch) | |
| tree | edfa616f08206a14f9ccd8b6adb461b9d6afd0fc | |
| parent | 21ab6c066d3ca953409916f0a78d1c022a665d29 (diff) | |
| download | external_llvm-f5ade5d39abe5cb12a8202c604321d5992e4a168.zip external_llvm-f5ade5d39abe5cb12a8202c604321d5992e4a168.tar.gz external_llvm-f5ade5d39abe5cb12a8202c604321d5992e4a168.tar.bz2 | |
Add support for the R and Q constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137217 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMAsmPrinter.cpp | 24 | ||||
| -rw-r--r-- | test/CodeGen/ARM/inlineasm4.ll | 17 |
2 files changed, 39 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 559d4af..84a7af5 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -469,14 +469,34 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, return false; } + case 'R': // The most significant register of a pair. + case 'Q': { // The least significant register of a pair. + if (OpNum == 0) + return true; + const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1); + if (!FlagsOP.isImm()) + return true; + unsigned Flags = FlagsOP.getImm(); + unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags); + if (NumVals != 2) + return true; + unsigned RegOp = ExtraCode[0] == 'Q' ? OpNum : OpNum + 1; + if (RegOp >= MI->getNumOperands()) + return true; + const MachineOperand &MO = MI->getOperand(RegOp); + if (!MO.isReg()) + return true; + unsigned Reg = MO.getReg(); + O << ARMInstPrinter::getRegisterName(Reg); + return false; + } + // These modifiers are not yet supported. case 'p': // The high single-precision register of a VFP double-precision // register. case 'e': // The low doubleword register of a NEON quad register. case 'f': // The high doubleword register of a NEON quad register. case 'h': // A range of VFP/NEON registers suitable for VLD1/VST1. - case 'Q': // The least significant register of a pair. - case 'R': // The most significant register of a pair. case 'H': // The highest-numbered register of a pair. return true; } diff --git a/test/CodeGen/ARM/inlineasm4.ll b/test/CodeGen/ARM/inlineasm4.ll new file mode 100644 index 0000000..9ed4b99 --- /dev/null +++ b/test/CodeGen/ARM/inlineasm4.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -march=arm | FileCheck %s + +define double @f(double %x) { +entry: + %0 = tail call double asm "mov ${0:R}, #4\0A", "=&r"() + ret double %0 +; CHECK: f: +; CHECK: mov r1, #4 +} + +define double @g(double %x) { +entry: + %0 = tail call double asm "mov ${0:Q}, #4\0A", "=&r"() + ret double %0 +; CHECK: g: +; CHECK: mov r0, #4 +} |