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| author | Jim Grosbach <grosbach@apple.com> | 2010-11-17 21:05:55 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-11-17 21:05:55 +0000 |
| commit | f8dabac6041b2a38307a5ab0beb330ededb7514b (patch) | |
| tree | 8ff80e4eb9365d2da95798abe1eb1b0b59701518 | |
| parent | 6b19491468e44249a35d869642e7302aaacb220b (diff) | |
| download | external_llvm-f8dabac6041b2a38307a5ab0beb330ededb7514b.zip external_llvm-f8dabac6041b2a38307a5ab0beb330ededb7514b.tar.gz external_llvm-f8dabac6041b2a38307a5ab0beb330ededb7514b.tar.bz2 | |
Make the ARM BR_JTadd instruction an explicit pseudo and lower it properly
in the MC lowering process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119559 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMAsmPrinter.cpp | 22 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 15 |
2 files changed, 25 insertions, 12 deletions
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 081b160..b8cdbd3 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -938,8 +938,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { } case ARM::tBR_JTr: case ARM::BR_JTr: - case ARM::BR_JTm: - case ARM::BR_JTadd: { + case ARM::BR_JTm: { // Lower and emit the instruction itself, then the jump table following it. MCInst TmpInst; // FIXME: The branch instruction is really a pseudo. We should xform it @@ -949,6 +948,25 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { EmitJumpTable(MI); return; } + case ARM::BR_JTadd: { + // Lower and emit the instruction itself, then the jump table following it. + // add pc, target, idx + MCInst AddInst; + AddInst.setOpcode(ARM::ADDrr); + AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); + AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); + AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); + // Add predicate operands. + AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); + AddInst.addOperand(MCOperand::CreateReg(0)); + // Add 's' bit operand (always reg0 for this) + AddInst.addOperand(MCOperand::CreateReg(0)); + OutStreamer.EmitInstruction(AddInst); + + // Output the data for the jump table itself + EmitJumpTable(MI); + return; + } case ARM::TRAP: { // Non-Darwin binutils don't yet support the "trap" mnemonic. // FIXME: Remove this special case when they do. diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 3696fef..e437516 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1437,16 +1437,11 @@ let isBranch = 1, isTerminator = 1 in { let Inst{24} = 1; // P bit let Inst{27-25} = 0b011; } - def BR_JTadd : JTI<(outs), - (ins GPR:$target, GPR:$idx, jtblock_operand:$jt, i32imm:$id), - IIC_Br, "add\tpc, $target, $idx$jt", - [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt, - imm:$id)]> { - let Inst{15-12} = 0b1111; - let Inst{20} = 0; // S bit - let Inst{24-21} = 0b0100; - let Inst{27-25} = 0b000; - } + def BR_JTadd : PseudoInst<(outs), + (ins GPR:$target, GPR:$idx, jtblock_operand:$jt, i32imm:$id), + IIC_Br, "", + [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt, + imm:$id)]>; } // isNotDuplicable = 1, isIndirectBranch = 1 } // isBarrier = 1 |