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| author | Richard Osborne <richard@xmos.com> | 2008-11-07 10:59:00 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2008-11-07 10:59:00 +0000 |
| commit | b25baef26f03b9909b65dd5f762b38f93000445d (patch) | |
| tree | f03bc8e40b55feab99b0f32e4428d215fa45f988 /autoconf | |
| parent | 4df60f5491ff35c8a48c2cf14e18a33c9793b3bb (diff) | |
| download | external_llvm-b25baef26f03b9909b65dd5f762b38f93000445d.zip external_llvm-b25baef26f03b9909b65dd5f762b38f93000445d.tar.gz external_llvm-b25baef26f03b9909b65dd5f762b38f93000445d.tar.bz2 | |
Add XCore backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'autoconf')
| -rw-r--r-- | autoconf/configure.ac | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/autoconf/configure.ac b/autoconf/configure.ac index f2c7714..2054548 100644 --- a/autoconf/configure.ac +++ b/autoconf/configure.ac @@ -225,6 +225,7 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch], arm-*) llvm_cv_target_arch="ARM" ;; mips-*) llvm_cv_target_arch="Mips" ;; pic16-*) llvm_cv_target_arch="PIC16" ;; + xcore-*) llvm_cv_target_arch="XCore" ;; *) llvm_cv_target_arch="Unknown" ;; esac]) @@ -332,6 +333,7 @@ else ARM) AC_SUBST(TARGET_HAS_JIT,0) ;; Mips) AC_SUBST(TARGET_HAS_JIT,0) ;; PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;; + XCore) AC_SUBST(TARGET_HAS_JIT,0) ;; *) AC_SUBST(TARGET_HAS_JIT,0) ;; esac fi @@ -381,7 +383,7 @@ AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets], [Build specific host targets: all,host-only,{target-name} (default=all)]),, enableval=all) case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 CBackend MSIL CppBackend" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 XCore CBackend MSIL CppBackend" ;; host-only) case "$llvm_cv_target_arch" in x86) TARGETS_TO_BUILD="X86" ;; @@ -394,6 +396,7 @@ case "$enableval" in Mips) TARGETS_TO_BUILD="Mips" ;; CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;; PIC16) TARGETS_TO_BUILD="PIC16" ;; + XCore) TARGETS_TO_BUILD="XCore" ;; *) AC_MSG_ERROR([Can not set target to build]) ;; esac ;; @@ -409,6 +412,7 @@ case "$enableval" in mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;; + xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; |