aboutsummaryrefslogtreecommitdiffstats
path: root/docs/LangRef.html
diff options
context:
space:
mode:
authorJohn Criswell <criswell@uiuc.edu>2004-04-12 15:02:16 +0000
committerJohn Criswell <criswell@uiuc.edu>2004-04-12 15:02:16 +0000
commit183402a788cd769e039f71b21bef621fbcafd346 (patch)
tree8abc658a101df27920a5dff8dcc5110b54b3da8c /docs/LangRef.html
parentf9c455d3dff3cd9b8a8c94c1e64057b3142c333c (diff)
downloadexternal_llvm-183402a788cd769e039f71b21bef621fbcafd346.zip
external_llvm-183402a788cd769e039f71b21bef621fbcafd346.tar.gz
external_llvm-183402a788cd769e039f71b21bef621fbcafd346.tar.bz2
Added initial design for the llvm.readio and llvm.writeio intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12864 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs/LangRef.html')
-rw-r--r--docs/LangRef.html96
1 files changed, 96 insertions, 0 deletions
diff --git a/docs/LangRef.html b/docs/LangRef.html
index 8417259..76655ad 100644
--- a/docs/LangRef.html
+++ b/docs/LangRef.html
@@ -107,6 +107,8 @@
<ol>
<li><a href="#i_readport">'<tt>llvm.readport</tt>' Intrinsic</a></li>
<li><a href="#i_writeport">'<tt>llvm.writeport</tt>' Intrinsic</a></li>
+ <li><a href="#i_readio">'<tt>llvm.readio</tt>' Intrinsic</a></li>
+ <li><a href="#i_writeio">'<tt>llvm.writeio</tt>' Intrinsic</a></li>
</ol>
<li><a href="#int_libc">Standard C Library Intrinsics</a>
<ol>
@@ -2013,6 +2015,7 @@ operating system level code.
</p>
</div>
+
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
<a name="i_readport">'<tt>llvm.readport</tt>' Intrinsic</a>
@@ -2095,6 +2098,99 @@ value written must be 8, 16, or 32 bits in length.
</div>
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+ <a name="i_readio">'<tt>llvm.readio</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+ call &lt;integer type&gt; (&lt;integer type&gt;)* %llvm.readio (&lt;integer type&gt; &lt;address&gt;)
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.readio</tt>' intrinsic reads data from a memory mapped I/O
+address.
+</p>
+
+<h5>Arguments:</h5>
+
+<p>
+The argument to this intrinsic indicates the memory address from which to read
+the data.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+The '<tt>llvm.readio</tt>' intrinsic reads data from a memory mapped I/O
+location specified by <i>address</i> and returns the value. The address and
+return value must be integers, but the size allowed for each is dependent upon
+the platform upon which the program is code generated.
+</p>
+
+<p>
+This intrinsic ensures that the I/O data read occurs in instruction order in
+relation to other I/O data reads and writes (as opposed to a normal load, where
+hardware scheduling can re-arrange the actual memory accesses to occur out of
+order).
+</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+ <a name="i_writeio">'<tt>llvm.writeio</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+ call void (&lt;integer type&gt;, &lt;integer type&gt;)* %llvm.writeio (&lt;integer type&gt; &lt;value&gt;, &lt;integer type&gt; &lt;address&gt;)
+</pre>
+
+<h5>Overview:</h5>
+
+<p>
+The '<tt>llvm.writeio</tt>' intrinsic writes data to the specified memory
+mapped I/O address.
+</p>
+
+<h5>Arguments:</h5>
+
+<p>
+The first argument to this intrinsic indicates the memory address to which data
+should be written.
+</p>
+
+<p>
+The second argument is the value to write to the memory mapped I/O location.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+The '<tt>llvm.writeio</tt>' intrinsic writes <i>value</i> to the memory mapped
+I/O address specified by <i>address</i>. The address and value must be
+integers, but the size is dependent upon the platform upon which the program is
+code generated.
+</p>
+
+<p>
+This intrinsic ensures that the I/O data write occurs in instruction order in
+relation to other I/O data reads and writes (as opposed to a normal store,
+where hardware scheduling can re-arrange the actual memory accesses to occur
+out of order).
+</p>
+
+</div>
+
+
<!-- ======================================================================= -->
<div class="doc_subsection">
<a name="int_libc">Standard C Library Intrinsics</a>