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authorAndrew Lenharth <andrewl@lenharth.org>2005-11-11 16:47:30 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-11-11 16:47:30 +0000
commit51b8d54922350b7e1c2cd5a5183ef2c5f5d1b1d5 (patch)
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parentaeef8fc5c6124a34bd2a723071a3982b559c26f2 (diff)
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continued readcyclecounter support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24300 91177308-0d34-0410-b5e6-96231b3b80d8
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diff --git a/docs/LangRef.html b/docs/LangRef.html
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@@ -128,6 +128,7 @@
<li><a href="#i_frameaddress">'<tt>llvm.frameaddress</tt>' Intrinsic</a></li>
<li><a href="#i_prefetch">'<tt>llvm.prefetch</tt>' Intrinsic</a></li>
<li><a href="#i_pcmarker">'<tt>llvm.pcmarker</tt>' Intrinsic</a></li>
+ <li><a href="#i_readcyclecounter"><tt>llvm.readcyclecounter</tt>' Intrinsic</a></li>
</ol>
</li>
<li><a href="#int_os">Operating System Intrinsics</a>
@@ -2811,6 +2812,39 @@ support this intrinisic may ignore it.
</div>
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+ <a name="i_readcyclecounter">'<tt>llvm.readcyclecounter</tt>' Intrinsic</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>
+ declare ulong %llvm.readcyclecounter( )
+</pre>
+
+<h5>Overview:</h5>
+
+
+<p>
+The '<tt>llvm.readcyclecounter</tt>' intrinsic provides access to the cycle
+counter register (or similar low latency, high accuracy clocks) on those targets
+that support it. On X86, it should map to RDTSC. On Alpha, it should map to RPCC.
+As the backing counters overflow quickly (on the order of 9 seconds on alpha), this
+should only be used for small timings.
+</p>
+
+<h5>Semantics:</h5>
+
+<p>
+When directly supported, reading the cycle counter should not modify any memory.
+Implementations are allowed to either return a application specific value or a
+system wide value. On backends without support, this is lowered to a constant 0.
+</p>
+
+</div>
+
<!-- ======================================================================= -->
<div class="doc_subsection">