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author | Chris Lattner <sabre@nondot.org> | 2005-10-29 07:07:09 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-10-29 07:07:09 +0000 |
commit | c463b2746670b90575fc8f388a55f2a6867db905 (patch) | |
tree | 9e3fc80d3f1a52c291706dd2f71005e561ccdc1b /docs/ReleaseNotes.html | |
parent | e0f5897d3b54d67178533a136004cacd1868404f (diff) | |
download | external_llvm-c463b2746670b90575fc8f388a55f2a6867db905.zip external_llvm-c463b2746670b90575fc8f388a55f2a6867db905.tar.gz external_llvm-c463b2746670b90575fc8f388a55f2a6867db905.tar.bz2 |
First hack-and-slash on the release notes. Comments and improvements welcome
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24092 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs/ReleaseNotes.html')
-rw-r--r-- | docs/ReleaseNotes.html | 190 |
1 files changed, 167 insertions, 23 deletions
diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html index 465f719..2374278 100644 --- a/docs/ReleaseNotes.html +++ b/docs/ReleaseNotes.html @@ -20,7 +20,7 @@ </ol> <div class="doc_author"> - <p>Written by the <a href="http://llvm.cs.uiuc.edu">LLVM Team</a><p> + <p>Written by the <a href="http://llvm.org">LLVM Team</a><p> </div> <!-- *********************************************************************** --> @@ -35,12 +35,12 @@ infrastructure, release 1.6. Here we describe the status of LLVM, including any known problems and major improvements from the previous release. The most up-to-date version of this document can be found on the <a -href="http://llvm.cs.uiuc.edu/releases/1.6/">LLVM 1.6 web site</a>. If you are +href="http://llvm.org/releases/1.6/">LLVM 1.6 web site</a>. If you are not reading this on the LLVM web pages, you should probably go there because this document may be updated after the release.</p> <p>For more information about LLVM, including information about the latest -release, please check out the <a href="http://llvm.cs.uiuc.edu">main LLVM +release, please check out the <a href="http://llvm.org/">main LLVM web site</a>. If you have questions or comments, the <a href="http://mail.cs.uiuc.edu/mailman/listinfo/llvmdev">LLVM developer's mailing list</a> is a good place to send them.</p> @@ -48,7 +48,7 @@ list</a> is a good place to send them.</p> <p>Note that if you are reading this file from CVS or the main LLVM web page, this document applies to the <i>next</i> release, not the current one. To see the release notes for the current or previous releases, see the <a -href="http://llvm.cs.uiuc.edu/releases/">releases page</a>.</p> +href="http://llvm.org/releases/">releases page</a>.</p> </div> @@ -60,11 +60,12 @@ href="http://llvm.cs.uiuc.edu/releases/">releases page</a>.</p> <div class="doc_text"> -<p>This is the seventh public release of the LLVM Compiler Infrastructure.</p> - -<p>LLVM 1.6 is known to correctly compile a wide range of C and C++ programs, -includes bug fixes for those problems found since the 1.5 release, and includes -a large number of new features and enhancements, described below.</p> +<p>This is the seventh public release of the LLVM Compiler Infrastructure. This +release incorporates a large number of enhancements and additions (primarily in +the code generator), which combine to improve the quality of the code generated +by LLVM by up to 30% in some cases. This release is also the first release to +have first-class support for Mac OS/X: all of the major bugs have been shaken +out and it is now as well supported as Linux on X86.</p> </div> @@ -73,14 +74,106 @@ a large number of new features and enhancements, described below.</p> <a name="newfeatures">New Features in LLVM 1.6</a> </div> +<!--_________________________________________________________________________--> +<div class="doc_subsubsection"><a name="iselgen">Instruction Selector +Generation from Target Description</a></div> + +<div class="doc_text"> +<p>LLVM now includes support for auto-generating large portions of the +instruction selectors from target descriptions. This allows us to +write patterns in the target .td file, instead of writing lots of +nasty C++ code. Most of the PowerPC instruction selector is now +generated from the PowerPC target description files and other targets +are adding support that will be live for LLVM 1.7.</p> + +<p>For example, here are some patterns used by the PowerPC backend. A +floating-point multiply then subtract instruction (FMSUBS):</p> + +<div class="doc_code"><p> +<tt>(set F4RC:$FRT, (fsub (fmul F4RC:$FRA, F4RC:$FRC), F4RC:$FRB))</tt> +</p></div> + +<p>Exclusive-or by 16-bit immediate (XORI):</p> + +<div class="doc_code"><p> +<tt>(set GPRC:$dst, (xor GPRC:$src1, immZExt16:$src2))</tt> +</p></div> + +<p>Exclusive-or by 16-bit immediate shifted right 16-bits (XORIS):</p> + +<div class="doc_code"><p> +<tt>(set GPRC:$dst, (xor GPRC:$src1, imm16Shifted:$src2))</tt> +</p></div> + +<p>With these definitions, we teach the code generator how to combine these two +instructions to xor an abitrary 32-bit immediate with the following +definition. The first line specifies what to match (a xor with an arbitrary +immediate) the second line specifies what to produce:</p> + +<div class="doc_code"><p> +<pre>def : Pat<(xor GPRC:$in, imm:$imm), + (XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>; +</pre> +</p></div> + +</div> + +<!--_________________________________________________________________________--> +<div class="doc_subsubsection"><a name="sched">Instruction Scheduling +Support</a></div> + +<div class="doc_text"> + +<p>Instruction selectors using the refined <a +href="CodeGenerator.html#instselect">instruction selection framework</a> can now +use a simple pre-pass scheduler included with LLVM 1.6. This scheduler is +currently simple (cannot be configured much by the targets), but will be +extended in the future.</p> +</div> + +<!--_________________________________________________________________________--> +<div class="doc_subsubsection"><a name="subtarget">Code Generator Subtarget +Support</a></div> + +<div class="doc_text"> +<p>It is now straight-forward to parameterize a target implementation, and +provide a mapping from CPU names to sets of target parameters. LLC now supports +a <tt>-mcpu=cpu</tt> option that lets you choose a subtarget by CPU name: use +"<tt>llvm-as < /dev/null | llc -march=XXX -mcpu=help</tt>" to get a list of +supported CPUs for target "XXX". It also provides a +<tt>-mattr=+attr1,-attr2</tt> option that can be used to control individual +features of a target (the previous command will list available features as +well).</p> + +<p>This functionality is nice when you want tell LLC something like "compile to +code that is specialized for the PowerPC G5, but doesn't use altivec code. In +this case, using "<tt>llc -march=ppc32 -mcpu=g5 -mattr=-altivec</tt>".</p> + +</div> + +<!--_________________________________________________________________________--> +<div class="doc_subsubsection"><a name="jitlock">Other New Features</a></div> + <div class="doc_text"> <ol> <li>The JIT now uses mutexes to protect its internal data structures. This allows multi-threaded programs to be run from the JIT or interpreter without corruption of the internal data structures. See - <a href="http://llvm.cs.uiuc.edu/PR418">PR418</a> and - <a href="http://llvm.cs.uiuc.edu/PR540">PR540</a> for the details. + <a href="http://llvm.org/PR418">PR418</a> and + <a href="http://llvm.org/PR540">PR540</a> for the details. </li> + <li>LLVM on Win32 <a href="http://llvm.org/PR614">no longer requires sed, + flex, or bison when compiling with Visual C++</a>.</li> + <li>The llvm-test suite can now use the NAG Fortran to C compiler to compile + SPEC FP programs if available (allowing us to test all of SPEC'95 & + 2000).</li> + <li>When bugpoint is grinding away and the user hits ctrl-C, it now + gracefully stops and gives what it has reduced so far, instead of + giving up completely. In addition, <a href="http://llvm.org/PR576">the JIT + debugging mode of bugpoint is much faster</a>.</li> + <li>LLVM now includes Xcode project files in the llvm/Xcode directory.</li> + <li>LLVM now supports Mac OS/X on Intel.</li> + <li>LLVM now builds cleanly with GCC 4.1.</li> </ol> </div> @@ -89,11 +182,45 @@ a large number of new features and enhancements, described below.</p> <a name="codequality">Code Quality Improvements in LLVM 1.6</a> </div> +<div class="doc_text"> +<ol> + <li>The <tt>-globalopt</tt> pass can now statically evaluate C++ static + constructors when they are simple enough. For example, it can + now statically initialize "<tt>struct X { int a; X() : a(4) {} } g;</tt>". + </li> + <li>The Loop Strength Reduction pass has been completely rewritten, is far + more aggressive, and is turned on by default in the RISC targets. On PPC, + we find that it often speeds up programs from 10-40% depending on the + program.</li> + <li>The code produced when exception handling is enabled is far more + efficient in some cases, particularly on Mac OS/X.</li> +</ol> +</div> + + <!--=========================================================================--> <div class="doc_subsection"> <a name="codequality">Code Generator Improvements in LLVM 1.6</a> </div> +<div class="doc_text"> +<ol> +<li>The Alpha backend is substantially more stable and robust than in LLVM 1.5. + For example, it now fully supports varargs functions. The Alpha backend + also now features beta JIT support.</li> +<li>The code generator contains a new component, the DAG Combiner. This allows + us to optimize lowered code (e.g. after 64-bit operations have been lowered + to use 32-bit registers on 32-bit targets) and do fine-grained bit-twiddling + optimizations for the backend.</li> +<li>The SelectionDAG infrastructure is far more capable and mature, able to + handle many new target peculiarities in a target-independent way.</li> +<li>The default <a href="http://llvm.org/PR547">register allocator is now far + faster on some testcases</a>, + particularly on targets with a large number of registers (e.g. IA64 + and PPC).</li> +</ol> +</div> + <!--=========================================================================--> <div class="doc_subsection"> <a name="bugfix">Significant Bugs Fixed in LLVM 1.6</a> @@ -101,7 +228,22 @@ a large number of new features and enhancements, described below.</p> <div class="doc_text"> <ol> - <li><a href="http://llvm.cs.uiuc.edu/PR591">[simplify-libcalls] The simplify-libcalls pass generates ill-formed LLVM code</a>.</li> + <li>A vast number of bugs have been fixed in the PowerPC backend and in + llvm-gcc when configured for Mac OS/X (particularly relating to ABI + issues). For example: + <a href="http://llvm.org/PR603">PR449</a>, + <a href="http://llvm.org/PR594">PR594</a>, + <a href="http://llvm.org/PR603">PR603</a>, + <a href="http://llvm.org/PR609">PR609</a>, + <a href="http://llvm.org/PR630">PR630</a>, + <a href="http://llvm.org/PR643">PR643</a>, + and several others without bugzilla bugs.</li> + <li>Several bugs in tail call support have been fixed.</li> + <li><a href="http://llvm.org/PR608">configure does not correctly detect gcc + version on cygwin</a>.</li> + <li>Many many other random bugs have been fixed. Query <a + href="http://llvm.org/bugs">our bugzilla</a> with a target of 1.6 for more + information.</li> </ol> </div> @@ -145,7 +287,7 @@ portability patches and reports of successful builds or error messages.</p> <p>This section contains all known problems with the LLVM system, listed by component. As new problems are discovered, they will be added to these sections. If you run into a problem, please check the <a -href="http://llvm.cs.uiuc.edu/bugs/">LLVM bug database</a> and submit a bug if +href="http://llvm.org/bugs/">LLVM bug database</a> and submit a bug if there isn't already one.</p> </div> @@ -169,6 +311,7 @@ components, please contact us on the llvmdev list.</p> <li>The <tt>llvm-db</tt> tool is in a very early stage of development, but can be used to step through programs and inspect the stack.</li> <li>The SparcV8 and IA64 code generators are experimental.</li> +<li>The Alpha JIT is experimental.</li> </ul> </div> @@ -206,7 +349,7 @@ components, please contact us on the llvmdev list.</p> </pre></li> <li>Initialization of global union variables can only be done <a -href="http://llvm.cs.uiuc.edu/PR162">with the largest union member</a>.</li> +href="http://llvm.org/PR162">with the largest union member</a>.</li> </ul> </div> @@ -431,7 +574,7 @@ Analysis rules. As such, special options may be necessary to compile the code (for example, GCC requires the <tt>-fno-strict-aliasing</tt> option). This problem probably cannot be fixed.</li> -<li><a href="http://llvm.cs.uiuc.edu/PR56">Zero arg vararg functions are not +<li><a href="http://llvm.org/PR56">Zero arg vararg functions are not supported</a>. This should not affect LLVM produced by the C or C++ frontends.</li> @@ -447,7 +590,8 @@ frontends.</li> <div class="doc_text"> <ul> -<li><a href="http://llvm.cs.uiuc.edu/PR566">Memory Mapped I/O Intrinsics do not fence memory</a></li> +<li><a href="http://llvm.org/PR566">Memory Mapped I/O Intrinsics do not fence +memory</a></li> </ul> </div> @@ -473,7 +617,7 @@ frontends.</li> <div class="doc_text"> <ul> -<li><a href="http://llvm.cs.uiuc.edu/PR60">[sparcv9] SparcV9 backend miscompiles +<li><a href="http://llvm.org/PR60">[sparcv9] SparcV9 backend miscompiles several programs in the LLVM test suite</a></li> </ul> @@ -511,7 +655,7 @@ made where the argument is not 16-byte aligned, as required on IA64. (Strictly speaking this is not a bug in the IA64 back-end; it will also be encountered when building C++ programs using the C back-end.)</li> -<li>The C++ front-end does not use <a href="http://llvm.cs.uiuc.edu/PR406">IA64 +<li>The C++ front-end does not use <a href="http://llvm.org/PR406">IA64 ABI compliant layout of v-tables</a>. In particular, it just stores function pointers instead of function descriptors in the vtable. This bug prevents mixing C++ code compiled with LLVM with C++ objects compiled by other C++ @@ -549,16 +693,16 @@ arithmetic). This back-end is in pre-beta state.</li> <div class="doc_text"> <p>A wide variety of additional information is available on the <a -href="http://llvm.cs.uiuc.edu">LLVM web page</a>, including <a -href="http://llvm.cs.uiuc.edu/docs/">documentation</a> and <a -href="http://llvm.cs.uiuc.edu/pubs/">publications describing algorithms and +href="http://llvm.org">LLVM web page</a>, including <a +href="http://llvm.org/docs/">documentation</a> and <a +href="http://llvm.org/pubs/">publications describing algorithms and components implemented in LLVM</a>. The web page also contains versions of the API documentation which is up-to-date with the CVS version of the source code. You can access versions of these documents specific to this release by going into the "<tt>llvm/doc/</tt>" directory in the LLVM tree.</p> <p>If you have any questions or comments about LLVM, please feel free to contact -us via the <a href="http://llvm.cs.uiuc.edu/docs/#maillist"> mailing +us via the <a href="http://llvm.org/docs/#maillist"> mailing lists</a>.</p> </div> @@ -572,7 +716,7 @@ lists</a>.</p> <a href="http://validator.w3.org/check/referer"><img src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a> - <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a><br> + <a href="http://llvm.org/">The LLVM Compiler Infrastructure</a><br> Last modified: $Date$ </address> |